Abstract: A wireless headset having a user interface configured to allow the user to utilize the full functionality of the headset while minimizing the number of physical control inputs necessary is described. The user interface may have a user input control that is configured to control more than one function of the headset. The user interface may also provide audio as well as visual outputs to the user to indicate a particular functionality of the headset being controlled by the user or a particular status of the headset.

Abstract: A system and method for preventing a wireless controller system and WiFi radio system within a console from interfering with each other. The WiFi system is prevented from activating its transmitter during the controller receive times by detecting a signal sent to the WiFi module indicating where the controller receive times occur. Based upon the state of the signal, the WiFi transmission algorithm can determine the appropriate times to turn on and off the WiFi transmitter in concert with the defined 802.11 media access protocol. Furthermore, the WiFi module provides its operating channel information to the controller radio system to avoid using the WiFi channel for any communications.

Abstract: A serial modem (14) having a phase-locked loop (22), a central processing unit (20), a serial buffer (26) and a universal asynchronous receiver transmitter (UART) (28), wherein the serial buffer (26) and the UART (28) are connected to a host device (10) via an asynchronous serial interface (32). The central processing unit (20) enters a sleep mode when data is not being received. A start bit is received at a predetermined baud rate via the asynchronous serial interface (32). An interrupt is activated to start a wake-up transition at the central processing unit (20) upon receipt of the start bit. A series of bits following the start bit is sampled and stored in the serial buffer (26) until the central processing unit (20) is enabled. After the central processing unit (20) is enabled, a remainder of the series of bits are sampled and stored at the UART (28).

Abstract: A serial modem (14) having a phase-locked loop (22), a central processing unit (20), a serial buffer (26) and a universal asynchronous receiver transmitter (UART) (28), wherein the serial buffer (26) and the UART (28) are connected to a host device (10) via an asynchronous serial interface (32). The central processing unit (20) enters a sleep mode when data is not being received. A start bit s received at a predetermined baud rate via the asynchronous serial interface (32). An interrupt is activated to start a wake-up transition at the central processing unit (20) upon receipt of the start bit. A series of bits following the start bit is sampled and stored in the serial buffer (26) until the central processing unit (20) is enabled. After the central processing unit (20) is enabled, a remainder of the series of bits are sampled and stored at the UART (28).

Abstract: A method and apparatus for constructing a digital phase differentiator incorporating a dynamic decrement counter (30). A limited signal is sampled at a fixed sampling rate. A fixed rate for an intermediate frequency is obtained. The fixed sampling rate is divided by a divisor to obtain a frequency of a clock. The frequency of the clock is divided by the intermediate frequency to obtain an desired average divider. A set of integer load values (34, 36 and 38) is selected that on average yields a non-integer value that is close to the desired average divider. A load of the dynamic decrement counter (30) changes cyclically using the set of integer load values (34, 36 and 38) to obtain a phase of the limited signal.

Abstract: A computing device (100) including a wireless packet data communications modem (101) used in conjunction with a computer (103) to provide untethered access to data bases and other computer users. A method is provided for controlling data transmission and reception using the wireless packet data communications modem (101) in tandem with the computer (103). Two-way communications is achieved using a small, low-cost, light-weight wireless packet data communications modem contained in a housing, integral to a computing device, or a removable housing conforming to a PCMCIA industry standard.

Abstract: A data demodulator operating to recover symbols from a data signal including, an estimator, coupled to the data signal, for estimating a reference parameter, and a decision function that is responsive to the reference parameter and the data signal, for selecting a symbol for a symbol time from a set of predetermined symbols where the symbol is coupled to the estimator for updating the reference parameter when the symbol is representative of the reference parameter.

Abstract: A PCMCIA card having independent functionality and alternatively arranged to operate in conjunction with a host computer, that includes a peripheral apparatus (109) having an integral CPU (125), a power source (129), and a power supply (127) for exhibiting an independent operating state; and an interface function (121) integral with and coupled to said peripheral apparatus (109), said interface function arranged and constructed to couple said peripheral apparatus to the host computer (101) over a PCMCIA compliant interface and initiate a dependent operating state at said peripheral apparatus (109).

Abstract: In a data communications system including an infrastructure and a subscriber unit operating with a protocol that mandates proactive scanning, a method of power conservation practiced at the subscriber unit including monitoring a registered data channel during an active time period (403), assessing the data channel during the active time period to provide a channel quality value (407), comparing the channel quality to a first threshold (413), assuming a sleep state when the channel quality satisfies the first threshold (417), and scanning another data channel for another channel quality value that satisfies a second threshold when the channel quality does not satisfy the first threshold (415).