Patents by Inventor David Wade EICKBUSCH

David Wade EICKBUSCH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Level shifter with deterministic output during power-up sequence
    Patent number: 10855261
    Abstract: Level-shifting circuits including a plurality of p-type metal oxide semiconductor (PMOS) devices and n-type metal oxide semiconductor (NMOS) devices may be used to level-shift an input voltage signal between a low voltage domain having a low voltage level and a high voltage domain having a high voltage level, to obtain an output voltage signal having an output voltage level at an output node. A current-controlled tie circuit may be connected between the output node and the output voltage level, to conduct a current that causes the output node of the level-shifting circuit to be in a pre-defined logic state during a power-up sequence of the level-shifting circuit. Accordingly, spurious, non-deterministic output levels are avoided during the power-up sequence.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: December 1, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jianan Yang, James Nissen, David Wade Eickbusch
  • LEVEL SHIFTER WITH DETERMINISTIC OUTPUT DURING POWER-UP SEQUENCE
    Publication number: 20200136596
    Abstract: Level-shifting circuits including a plurality of p-type metal oxide semiconductor (PMOS) devices and n-type metal oxide semiconductor (NMOS) devices may be used to level-shift an input voltage signal between a low voltage domain having a low voltage level and a high voltage domain having a high voltage level, to obtain an output voltage signal having an output voltage level at an output node. A current-controlled tie circuit may be connected between the output node and the output voltage level, to conduct a current that causes the output node of the level-shifting circuit to be in a pre-defined logic state during a power-up sequence of the level-shifting circuit. Accordingly, spurious, non-deterministic output levels are avoided during the power-up sequence.
    Type: Application
    Filed: October 30, 2018
    Publication date: April 30, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jianan YANG, James NISSEN, David Wade EICKBUSCH