Patents by Inventor David Zipperstein
David Zipperstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12597945Abstract: Processing circuitry comprising an analog-to-digital converter configured to perform the techniques of this disclosure. The analog-to-digital converter may obtain, based on electrical interactions with a resolver sensor, a noisy modulated digital cosine signal (NMDCS) and a noisy modulated digital sine signal (NMDSS). The processing circuitry includes a filter configured to process the NMDCS and the NMDSS to output a filtered NMDCS and a filtered NMDSS, and a rectifier configured to process the filtered NMDCS and the filtered NMDSS to output a rectified NMDCS and a rectified NMDSS. The processing circuitry includes a digital signal processor that executes a first trained machine learning model to process the rectified NMDCS and the rectified NMDSS to obtain a demodulated DCS and a demodulated DSS, and compute, based on the demodulated DCS and the demodulated DSS, an approximate angle of the rotating element.Type: GrantFiled: April 25, 2024Date of Patent: April 7, 2026Assignee: Infineon Technologies AGInventors: Mihail Jefremow, Juergen Schaefer, David Zipperstein, Arndt Voigtlaender
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Publication number: 20250337434Abstract: Processing circuitry comprising an analog-to-digital converter configured to perform the techniques of this disclosure. The analog-to-digital converter may obtain, based on electrical interactions with a resolver sensor, a noisy modulated digital cosine signal (NMDCS) and a noisy modulated digital sine signal (NMDSS). The processing circuitry includes a filter configured to process the NMDCS and the NMDSS to output a filtered NMDCS and a filtered NMDSS, and a rectifier configured to process the filtered NMDCS and the filtered NMDSS to output a rectified NMDCS and a rectified NMDSS. The processing circuitry includes a digital signal processor that executes a first trained machine learning model to process the rectified NMDCS and the rectified NMDSS to obtain a demodulated DCS and a demodulated DSS, and compute, based on the demodulated DCS and the demodulated DSS, an approximate angle of the rotating element.Type: ApplicationFiled: April 25, 2024Publication date: October 30, 2025Inventors: Mihail Jefremow, Juergen Schaefer, David Zipperstein, Arndt Voigtlaender
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Patent number: 11942959Abstract: A calibration circuit, including: a signal generator circuit configured to generate a modulated analog input signal, which is based on a digital input word that is modulated; an Analog-to-Digital Converter (ADC) configured to convert an analog reference signal to a digital calibration word, wherein the analog reference signal is a low-pass-filtered version of the analog input signal generated by the signal generator circuit; and a feedback circuit configured to output the digital input word by adjusting the digital calibration word depending on a digital feedback signal, which is based on a modulated version of the analog reference signal, wherein the signal generator circuit, the ADC, and the feedback circuit are provided on a same chip.Type: GrantFiled: September 28, 2021Date of Patent: March 26, 2024Assignee: Infineon Technologies AGInventors: Mihail Jefremow, Stefan Koeck, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, David Zipperstein
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Patent number: 11831306Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.Type: GrantFiled: June 9, 2022Date of Patent: November 28, 2023Assignee: Infineon Technologies AGInventors: Mihail Jefremow, David Zipperstein, Juergen Schaefer, Holger Dienst, Markus Bichl, Ralph Mueller-Eschenbach, Arndt Voigtlaender
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Publication number: 20230106703Abstract: A calibration circuit, including: a signal generator circuit configured to generate a modulated analog input signal, which is based on a digital input word that is modulated; an Analog-to-Digital Converter (ADC) configured to convert an analog reference signal to a digital calibration word, wherein the analog reference signal is a low-pass-filtered version of the analog input signal generated by the signal generator circuit; and a feedback circuit configured to output the digital input word by adjusting the digital calibration word depending on a digital feedback signal, which is based on a modulated version of the analog reference signal, wherein the signal generator circuit, the ADC, and the feedback circuit are provided on a same chip.Type: ApplicationFiled: September 28, 2021Publication date: April 6, 2023Inventors: Mihail Jefremow, Stefan Koeck, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, David Zipperstein
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Patent number: 11621717Abstract: A calibration circuit, including: a first analog-to-digital converter (ADC) configured to sample a nonlinear reference signal continuously at an equidistant sampling rate to generate a reference sampled signal; a trigger timer configured to generate trigger signals; a second ADC configured to sample a point of each of the nonlinear reference signal and repeated versions of the nonlinear reference signal in response to the respective trigger signals at equidistantly increasing delays, to generate a device-under-test (DUT) sampled voltage; and processing circuitry configured to estimate a differential nonlinearity (DNL) of the DUT sampled signal, estimate a DNL of the reference sampled signal, and compare the estimated DNL of the DUT sampled signal with the estimated DNL of the reference sampled signal, to generate a DNL performance indication signal of the second ADC.Type: GrantFiled: November 5, 2021Date of Patent: April 4, 2023Assignee: Infineon Technologies AGInventors: Mihail Jefremow, Ralph Mueller-Eschenbach, Juergen Schaefer, Arndt Voigtlaender, David Zipperstein
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Publication number: 20220399886Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.Type: ApplicationFiled: June 9, 2022Publication date: December 15, 2022Inventors: Mihail Jefremow, David Zipperstein, Juergen Schaefer, Holger Dienst, Markus Bichl, Ralph Mueller-Eschenbach, Arndt Voigtlaender