Abstract: An antenna tuning circuit is provided. The antenna tuning circuit includes an envelope detector, an operational amplifier, and a switch. The envelope detector is configured to track an envelope of a signal received at an antenna terminal. The operational amplifier includes a first input coupled to an output of the envelope detector to receive a first signal and a second input coupled to receive a second signal and is configured to generate an output signal at an output based on the first signal and the second signal. The switch includes a first terminal coupled to the output of the operational amplifier, a second terminal coupled to the second input of the operational amplifier, and a control terminal coupled to receive a first control signal. The operational amplifier is configured in a follower configuration when the first control signal is at a first voltage value.

Abstract: An antenna tuning circuit is provided. The antenna tuning circuit includes an envelope detector, an operational amplifier, and a switch. The envelope detector is configured to track an envelope of a signal received at an antenna terminal. The operational amplifier includes a first input coupled to an output of the envelope detector to receive a first signal and a second input coupled to receive a second signal and is configured to generate an output signal at an output based on the first signal and the second signal. The switch includes a first terminal coupled to the output of the operational amplifier, a second terminal coupled to the second input of the operational amplifier, and a control terminal coupled to receive a first control signal. The operational amplifier is configured in a follower configuration when the first control signal is at a first voltage value.

Abstract: In accordance with a first aspect of the present disclosure, a front-end circuit for an RFID transponder is provided, the front-end circuit comprising: a rectifier configured to rectify an input voltage received from an antenna; a voltage limiter operatively coupled to the rectifier, said voltage limiter being configured to limit an output voltage of the rectifier; a level detector operatively coupled to the voltage limiter, said level detector being configured to compare a level of an output signal of the voltage limiter with a predefined reference level. In accordance with a second aspect of the present disclosure, a corresponding method of operating a front-end circuit is conceived.

Abstract: A system for measuring high power currents, including: a low power transistor that is a scaled replica of a high power transistor of a high power driver; a regulator connected to the low power transistor, wherein the regulator is configured to regulate the current flowing through the low power transistor based upon a voltage sensed across the high power transistor and a chop signal; a current mirror with an input connected to the regulator and an output; a current detector having in input configured to receive the chop signal, wherein the current detector is connected to the output of the current mirror and wherein the current detector is configured to measure the current at the output of the current mirror to produce an estimate of the current flowing through the high power transistor.

Abstract: A system for measuring high power currents, including: a low power transistor that is a scaled replica of a high power transistor of a high power driver; a regulator connected to the low power transistor, wherein the regulator is configured to regulate the current flowing through the low power transistor based upon a voltage sensed across the high power transistor and a chop signal; a current mirror with an input connected to the regulator and an output; a current detector having in input configured to receive the chop signal, wherein the current detector is connected to the output of the current mirror and wherein the current detector is configured to measure the current at the output of the current mirror to produce an estimate of the current flowing through the high power transistor.

Abstract: In one embodiment, a circuit, having a single supply, is provided to transmit a wireless signal with low common mode electromagnetic interference (EMI) emission. The circuit can achieve common mode attenuations of 40 dB or greater as a result of the symmetric built circuit. Also included is a system that includes a transmission circuit and a receiver circuit, and a method of using such a system.

Abstract: A sensor arrangement has a plurality of Hall sensor devices, each configured to provide a sensor voltage in response to a magnetic field intensity. A selection unit is configured to forward either of the sensor voltages in response to a selection signal. A transconductance amplifier is configured to generate a sensing current depending on a forwarded sensor voltage. A filter stage has a resistor and a filter capacitor connected in parallel in a switchable manner in response to a first switching signal. The filter stage is configured to generate a filtered voltage across the filter capacitor depending on a sensing current. A capacitive analog-to-digital converter has an input capacitor being connected to the filter capacitor in a switchable manner in response to a second switching signal. The analog-to-digital converter is configured to generate a digital sensor value based on a filtered voltage.

Abstract: In one embodiment, a circuit, having a single supply, is provided to transmit a wireless signal with low common mode electromagnetic interference (EMI) emission. The circuit can achieve common mode attenuations of 40 dB or greater as a result of the symmetric built circuit. Also included is a system that includes a transmission circuit and a receiver circuit, and a method of using such a system.

Abstract: An arrangement includes a transformer having a primary winding and a secondary winding, the transformer exhibiting an impedance across the primary winding, and an impedance synthesis circuit. The impedance synthesis circuit includes a transfer function element having a frequency spectrum. The transfer function element has associated a gain element and a current source controlled by the transfer function element. The impedance synthesis circuit is connected to said secondary winding, so that the transformer mirrors the impedance synthesized by the impedance synthesis circuit into the impedance across said primary winding. The primary winding is adapted to define the high voltage side of an XDSL splitter, while the impedance synthesis circuit connected to the secondary winding is inherently a low voltage circuit.

Abstract: A sensor arrangement has a plurality of Hall sensor devices, each configured to provide a sensor voltage in response to a magnetic field intensity. A selection unit is configured to forward either of the sensor voltages in response to a selection signal. A transconductance amplifier is configured to generate a sensing current depending on a forwarded sensor voltage. A filter stage has a resistor and a filter capacitor connected in parallel in a switchable manner in response to a first switching signal. The filter stage is configured to generate a filtered voltage across the filter capacitor depending on a sensing current. A capacitive analog-to-digital converter has an input capacitor being connected to the filter capacitor in a switchable manner in response to a second switching signal. The analog-to-digital converter is configured to generate a digital sensor value based on a filtered voltage.

Abstract: An arrangement includes a transformer having a primary winding and a secondary winding, the transformer exhibiting an impedance across the primary winding, and an impedance synthesis circuit. The impedance synthesis circuit includes a transfer function element having a frequency spectrum. The transfer function element has associated a gain element and a current source controlled by the transfer function element. The impedance synthesis circuit is connected to said secondary winding, so that the transformer mirrors the impedance synthesized by the impedance synthesis circuit into the impedance across said primary winding. The primary winding is adapted to define the high voltage side of an XDSL splitter, while the impedance synthesis circuit connected to the secondary winding is inherently a low voltage circuit.