Patents by Inventor Davide Morello

Davide Morello has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12782989
    Abstract: According to an embodiment, a linear voltage regulator is proposed. The regulator includes a voltage source circuit that provides a first voltage at its output terminal. An output transistor having a control terminal is coupled to the output terminal of the voltage source circuit to receive the first voltage. A first current path terminal of the output transistor is couplable to a load and provides a regulated output voltage to the load based on the first voltage. A feedback loop circuit includes sense circuitry to sense current sourced by the output transistor. The circuitry is coupled to a second current path terminal of the output transistor, and a second transistor is configured as a current mirror with the sense circuitry. The second transistor is coupled to the load, wherein the current mirror has a ratio of 1:M, where M is a number normally greater than or equal to 1.
    Type: Grant
    Filed: July 16, 2024
    Date of Patent: November 3, 2026
    Assignee: STMicroelectronics International N.V.
    Inventors: Michele Giorgio, Enrico Mammei, Davide Morello, Matteo Alessio Traldi, Paolo Pulici
  • Patent number: 12784769
    Abstract: A preamplifier circuit of a hard disk drive, the preamplifier circuit includes a writer circuit configured to generate a two-level current signal for driving a magnetic head of the hard disk drive. The two-level current signal includes a steady-state current and an overshoot current. The writer circuit includes a driver circuit configured to generate the overshoot current with a programmable duration. The driver circuit includes a delay circuit configured to generate a delay control signal controlling the programmable duration of the overshoot current. The writer circuit further includes a feedback circuit configured to generate an oscillation signal when coupled to the driver circuit. The oscillation signal has a frequency that corresponds to the programmable duration of the overshoot current.
    Type: Grant
    Filed: September 29, 2025
    Date of Patent: November 3, 2026
    Assignee: STMicroelectronics International N.V.
    Inventors: Matteo Alessio Traldi, Paolo Pulici, Alberto Vangelista, Davide Morello
  • Patent number: 12573419
    Abstract: According to an embodiment, a circuit for reducing current transition times includes a pre-biased first transistor, a second transistor, and a binary-weighted capacitor network with selectively activated capacitors controlled by logic gates receiving a command signal and boost selection signals. A resistor between the transistors provides a voltage restoration path. Another embodiment includes a binary-weighted resistor network with parallel resistor paths and switches. A write driver system incorporates the boost circuits, arranged in diagonal pairs across a bridge circuit. A control circuit activates the diagonal boost circuit pairs during switching transitions of the bridge circuit, generating current pulses that combine with the main bridge current to reduce transition times at a magnetic recording head while maintaining impedance matching.
    Type: Grant
    Filed: January 14, 2025
    Date of Patent: March 10, 2026
    Inventors: Enrico Mammei, Davide Morello, Matteo Alessio Traldi
  • Publication number: 20260023403
    Abstract: According to an embodiment, a linear voltage regulator is proposed. The regulator includes a voltage source circuit that provides a first voltage at its output terminal. An output transistor having a control terminal is coupled to the output terminal of the voltage source circuit to receive the first voltage. A first current path terminal of the output transistor is couplable to a load and provides a regulated output voltage to the load based on the first voltage. A feedback loop circuit includes sense circuitry to sense current sourced by the output transistor. The circuitry is coupled to a second current path terminal of the output transistor, and a second transistor is configured as a current mirror with the sense circuitry. The second transistor is coupled to the load, wherein the current mirror has a ratio of 1:M, where M is a number normally greater than or equal to 1.
    Type: Application
    Filed: July 16, 2024
    Publication date: January 22, 2026
    Inventors: Michele Giorgio, Enrico Mammei, Davide Morello, Matteo Alessio Traldi, Paolo Pulici