Abstract: In one embodiment, a system receives, at a sensor unit, a global positioning system (GPS) pulse signal from a GPS sensor of the autonomous driving vehicle (ADV), where the GPS pulse signal is a RF signal transmitted by a satellite to the GPS sensor, where the sensor unit is coupled to a number of sensors mounted on the ADV to perceive a driving environment surrounding the ADV and to plan a path to autonomously drive the ADV. The system receives a first local oscillator signal from a local oscillator. The system synchronizes the first local oscillator signal to the GPS pulse signal in real-time, including modifying the first local oscillator signal based on the GPS pulse signal. The system generates a second oscillator signal based on the synchronized first local oscillator signal, where the second oscillator signal is used to provide a time to at least one of the sensors.

Abstract: According to one embodiment, a source code is parsed to identify a first routine to perform a first function and a second routine to perform a second function. A control signaling topology is determined between the first routine and the second routine based on one or more statements associated with the first routine and the second routine defined in the source code. A first logic block is allocated describing a first hardware configuration representing the first function of the first routine. A second logic block is allocated describing a second hardware configuration representing the second function of the second routine. A register-transfer level (RTL) netlist is generated based on the first logic block and the second logic block. The second logic block is to perform the second function dependent upon the first function performed by the first logic block based on the control signaling topology.

Abstract: A method for testing peripheral component interconnect express (PCIe) devices is provided. The method implemented at a PCIe testing system detects that one or more PCIe devices have been inserted into one or more PCIe buses of a data processing system. In response to the detection, the PCIe testing system scans all PCIe buses of the data processing system to discover the one or more PCIe devices. For each of the PCIe devices discovered, the PCIe testing system repairs and retrains a PCIe link associated with the PCIe device, without rebooting the data processing system. The PCIe testing system loads a device driver instance for the PCIe device to be hosted by an operating system. The PCIe testing system then executes a test routine to concurrently test the one or more PCIe devices via the respective device driver instances.

Abstract: An apparatus includes a chassis housing a control server compartment, a compute server compartment, and an input and output (IO) subsystem compartment. The apparatus further includes an IO subsystem inserted into the IO subsystem compartment, a compute server inserted into the compute server compartment, and a control server inserted into the control server compartment coupled to the compute server via an Ethernet connection. The IO subsystem includes one or more IO modules, where at least some of the IO modules can be coupled to sensors. The compute server receives the sensor data from the IO subsystem via some PCIe links and generates planning and control data based on the sensor data for controlling the autonomous vehicle. The control server controls and operates the autonomous vehicle by sending control commands to hardware of the autonomous vehicle based on the planning and control data received from the compute server.

Abstract: A method for testing peripheral component interconnect express (PCIe) devices is provided. The method implemented at a PCIe testing system detects that one or more PCIe devices have been inserted into one or more PCIe buses of a data processing system. In response to the detection, the PCIe testing system scans all PCIe buses of the data processing system to discover the one or more PCIe devices. For each of the PCIe devices discovered, the PCIe testing system repairs and retrains a PCIe link associated with the PCIe device, without rebooting the data processing system. The PCIe testing system loads a device driver instance for the PCIe device to be hosted by an operating system. The PCIe testing system then executes a test routine to concurrently test the one or more PCIe devices via the respective device driver instances.

Abstract: According to one embodiment, a source code is parsed to identify a first routine to perform a first function and a second routine to perform a second function. A control signaling topology is determined between the first routine and the second routine based on one or more statements associated with the first routine and the second routine defined in the source code. A first logic block is allocated describing a first hardware configuration representing the first function of the first routine. A second logic block is allocated describing a second hardware configuration representing the second function of the second routine. A register-transfer level (RTL) netlist is generated based on the first logic block and the second logic block. The second logic block is to perform the second function dependent upon the first function performed by the first logic block based on the control signaling topology.