Patents by Inventor Dawei Wang

Dawei Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120140623
    Abstract: An apparatus, method and system are provided to allow a low power and fast application service transmission (LP-FAST) engine to enhance the quality of service (QoS) and optimize the power consumption of the mobile applications operating in a mobile terminal in a service-aware, bandwidth-aware and power-consumption-aware manner.
    Type: Application
    Filed: August 24, 2010
    Publication date: June 7, 2012
    Applicant: INTEL CORPORATION
    Inventors: Jiqiang Song, Dawei Wang, Leibo Liu, Eugene Tang, Shouyi Yin
  • Publication number: 20120098862
    Abstract: A method for processing graphics includes: receiving a graphic stream that carries a graphic type identifier; and obtaining the graphic type identifier, and displaying corresponding graphic content of the graphic stream if a graphic type is identifiable, or discarding the graphic stream if the graphic type is not identifiable. Because the graphic stream carries a graphic type identifier, when obtaining the graphic type identifier, the terminal judges whether the graphic type is identifiable, and displays the graphic content if the graphic type is identifiable or discards the graphic stream if the graphic type is not identifiable. In this way, if the terminal does not support the graphic type, the terminal can discard the graphic stream automatically, which enhances the terminal capability of processing graphics.
    Type: Application
    Filed: December 27, 2011
    Publication date: April 26, 2012
    Applicant: Huawei Technologies Co., Ltd.
    Inventors: Yu Hui, Jie Zhang, Teng Shi, Peiyu Yue, Feihu Jiang, Dawei Wang
  • Publication number: 20120072894
    Abstract: A method within network element, for directing traffic away from cards of first virtual partition, before changing software on cards of first virtual partition, until after cards of first virtual partition have session data, while network element services sessions. Redistribute sessions, serviced by cards of first virtual partition, to cards of second virtual partition. Each of virtual partitions has control card and line card. Direct traffic away from cards of first virtual partition, prior to taking line card of first virtual partition offline. After redistributing sessions, change software on line card of first virtual partition, while cards of second virtual partition service sessions, including redistributed sessions. After changing software, synchronize session data, for sessions serviced by cards of second virtual partition to cards of first virtual partition.
    Type: Application
    Filed: September 22, 2010
    Publication date: March 22, 2012
    Inventors: Dawei Wang, Rajeev Gupta, Renhua Wen
  • Patent number: 8039870
    Abstract: A multifinger carbon nanotube field-effect transistor (CNT FET) is provided in which a plurality of nanotube top gated FETs are combined in a finger geometry along the length of a single carbon nanotube, an aligned array of nanotubes, or a random array of nanotubes. Each of the individual FETs are arranged such that there is no geometrical overlap between the gate and drain finger electrodes over the single carbon nanotube so as to minimize the Miller capacitance (Cgd) between the gate and drain finger electrodes. A low-K dielectric may be used to separate the source and gate electrodes in the multifinger CNT FET so as to further minimize the Miller capacitance between the source and gate electrodes.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: October 18, 2011
    Assignee: RF Nano Corporation
    Inventors: Peter J. Burke, Steffen McKernan, Dawei Wang, Zhen Yu
  • Publication number: 20090189146
    Abstract: A multifinger carbon nanotube field-effect transistor (CNT FET) is provided in which a plurality of nonotube top gated FETs are combined in a finger geometry along the length of a single carbon nanotube, an aligned array of nanotubes, or a random array of nanotubes. Each of the individual FETs are arranged such that there is no geometrical overlap between the gate and drain finger electrodes over the single carbon nanotube so as to minimize the Miller capacitance (Cgd) between the gate and drain finger electrodes. A low-K dielectric may be used to separate the source and gate electrodes in the multifinger CNT FET so as t further minimize the Miller capacitance between the source and gate electrodes.
    Type: Application
    Filed: January 28, 2008
    Publication date: July 30, 2009
    Inventors: Peter J. Burke, Steffen McKernan, Dawei Wang, Zhen Yu
  • Publication number: 20090116696
    Abstract: A computer implemented method of characterizing a nanotube material by sampling a region of the nanotube material using a scanning electron microscope (SEM) to obtain at least one image, and analyzing the at least one image using an image processing algorithm to characterize the nanotube material.
    Type: Application
    Filed: May 23, 2008
    Publication date: May 7, 2009
    Inventors: Steffen McKernan, Dawei Wang, Zhen Yu
  • Publication number: 20080296689
    Abstract: A nanotube dual gate transistor and associated method of use are provided. The nanotube dual gate transistor includes a substrate, a nanotube material, a source conductor and a drain conductor, a top gate and a back gate. The nanotube material is formed over the substrate having a nanotube channel with a first end and a second end. The source conductor is coupled to the first end of the nanotube channel and the drain conductor is coupled to the second end of the nanotube channel. The back gate is formed under one or more of the devices for receiving a DC signal for establishing a desired optimal operational state of the device(s). The top gate is formed over the nanotube channel for receiving an AC signal for high frequency operation of the device(s) with low gate capacitance.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 4, 2008
    Inventors: Dawei Wang, Steffen McKernan