Patents by Inventor Dawei Xu
Dawei Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10499462Abstract: The present application discloses an on-line induction heating device for a wheel blank, consisting of a frame, a servo motor, guide posts I, guide sleeves I, a lower fixed plate, a lifting top plate, a bearing seat, a jacking cylinder, a piston connecting rod, a top cone, reset springs, radial positioning blocks, upper fixed plates, induction heating cylinders, connecting rods, double-head fastening nuts, fixed slide rails, mounting plates, outer protective jackets, induction coils, a displacement sensor I, a compression cylinder, a guide sleeve II, a guide post II, a gland, pressure sensors, asbestos, a displacement sensor II, water inlet pipes, water outlet pipes, a roller bed, transverse sliding tables, positioning cylinders, a supporting plate and lifting cylinders.Type: GrantFiled: September 1, 2017Date of Patent: December 3, 2019Assignee: CITIC DICASTAL CO., LTDInventors: Haiping Chang, Zhixue Wang, Jin Zhang, Rui Li, Dawei Xu, Bowen Xue, Changhai Li
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Patent number: 10425343Abstract: In an example, a method for packet classification may include cyclically splitting an initial rule set to generate multiple rule subsets, performing tree building for each rule subset to obtain multiple decision trees. The cyclic splitting may select a target rule set having a highest global average overlap rate, from a rule set group which includes the initial rule set before the cyclic splitting and will include the multiple rule subsets after the cyclic splitting; split the target rule set according to a split point to obtain two rule sets; add the two rule sets into the rule set group to replace the target rule set; and continue to select a new target rule set from the rule set group, until the number of rule sets in the rule set group reaches a preset number.Type: GrantFiled: April 29, 2016Date of Patent: September 24, 2019Assignee: Hewlett Packard Enterprise Development LPInventors: Dawei Xu, Chushun Wei, Kai Ren
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Publication number: 20190283107Abstract: The present disclosure discloses a method for forming a rim of a cast-spun aluminum alloy hub, that is, a special spinning composite machining method for forming a structure that the spokes and the inner wheel flange of the hub are cast and the middle of the rim is spun. The method can prevent the performance, strength and as-cast structure of the inner wheel flange from being destroyed, effectively improve the impact resistance of the cast-spun hub at the inner wheel flange, prevent the inner wheel flange of the cast-spun hub from cracking during radial impact and improve the performance of the spun structure of the rim, is beneficial to thinning the rim and realizes light weight of the rim.Type: ApplicationFiled: July 2, 2018Publication date: September 19, 2019Inventors: Haiping Chang, Lijuan Zhang, Shiwen Xu, Xuepu Yin, Hongwei Zhou, Zhixue Wang, Rui Li, Jin Zhang, Dawei Xu
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Patent number: 10384311Abstract: A spinning roller surface laser reinforced processing forming method is provided. A spinning roller is normalized after forging, the normalizing temperature is controlled to 860-880 DEG C., and the heat preservation time is 40-60 minutes; the spinning roller forging blank is roughly processed to reserve a tolerance allowance of 0.5 mm on the designated working face; the spinning roller and workpiece contact surface reinforcing layer is made of Ni625+WC2, in which WC is more than 22%; a reinforcing layer having the thickness of 0.8 mm is clad with laser on the working face of the spinning roller, and the preheating temperature is controlled to 250-400 DEG C. before welding; the spinning roller laser clad reinforcing layer is rolled; and the rolled spinning roller is put into a thermal treatment furnace for thermal treatment, and quenching and tempering treatment, re-crystallization and residual stress elimination are performed.Type: GrantFiled: August 29, 2017Date of Patent: August 20, 2019Assignee: CITIC Dicastal CO., LTD.Inventors: Haiping Chang, Zhixue Wang, Shiyou Gao, Jin Zhang, Rui Li, Dawei Xu, Donghui Zhang
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Publication number: 20190157299Abstract: A battery management chip circuit on the basis of an SOI process. The battery management chip circuit comprises a high-voltage multiplexer MUX, a voltage reference circuit, a Sigma-delta ADC (comprising an analog modulator and a digital filter), an SPI communication circuit, a function control circuit and a voltage value register. The battery management chip circuit is integrated on the basis of an SOI high-voltage process, and particularly, high-voltage MOS transistors adopted by the battery management chip circuit are high-voltage MOS device units on the basis of the SOI process. In addition, the present invention highlights the design of interface circuit-chopper circuit of the high-voltage multiplexer MUX and the Sigma-delta ADC, so as to describe the advantages such as decrease of difficulty of circuit design and reduction of layout area brought about when the present invention adopts the SOI process design and tape-out.Type: ApplicationFiled: July 1, 2016Publication date: May 23, 2019Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCESInventors: XINHONG CHENG, XINCHANG LI, ZHONGHAO WU, DAWEI XU, YUEHUI YU
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Publication number: 20180338353Abstract: The present application discloses an on-line induction heating device for a wheel blank, consisting of a frame, a servo motor, guide posts I, guide sleeves I, a lower fixed plate, a lifting top plate, a bearing seat, a jacking cylinder, a piston connecting rod, a top cone, reset springs, radial positioning blocks, upper fixed plates, induction heating cylinders, connecting rods, double-head fastening nuts, fixed slide rails, mounting plates, outer protective jackets, induction coils, a displacement sensor I, a compression cylinder, a guide sleeve II, a guide post II, a gland, pressure sensors, asbestos, a displacement sensor II, water inlet pipes, water outlet pipes, a roller bed, transverse sliding tables, positioning cylinders, a supporting plate and lifting cylinders.Type: ApplicationFiled: September 1, 2017Publication date: November 22, 2018Applicant: CITIC Dicastal CO.,LTDInventors: Haiping CHANG, Zhixue WANG, Jin ZHANG, Rui LI, Dawei XU, Bowen XUE, Changhai LI
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Publication number: 20180333802Abstract: A spinning roller surface laser reinforced processing forming method is provided. A spinning roller is normalized after forging, the normalizing temperature is controlled to 860-880 DEG C., and the heat preservation time is 40-60 minutes; the spinning roller forging blank is roughly processed to reserve a tolerance allowance of 0.5 mm on the designated working face; the spinning roller and workpiece contact surface reinforcing layer is made of Ni625+WC2, in which WC is more than 22%; a reinforcing layer having the thickness of 0.8 mm is clad with laser on the working face of the spinning roller, and the preheating temperature is controlled to 250-400 DEG C. before welding; the spinning roller laser clad reinforcing layer is rolled; and the rolled spinning roller is put into a thermal treatment furnace for thermal treatment, and quenching and tempering treatment, re-crystallization and residual stress elimination are performed.Type: ApplicationFiled: August 29, 2017Publication date: November 22, 2018Inventors: Haiping Chang, Zhixue Wang, Shiyou Gao, Jin Zhang, Rui Li, Dawei Xu, Donghui Zhang
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Publication number: 20180152385Abstract: In an example, a method for packet classification may include cyclically splitting an initial rule set to generate multiple rule subsets, performing tree building for each rule subset to obtain multiple decision trees. The cyclic splitting may select a target rule set having a highest global average overlap rate, from a rule set group which includes the initial rule set before the cyclic splitting and will include the multiple rule subsets after the cyclic splitting; split the target rule set according to a split point to obtain two rule sets; add the two rule sets into the rule set group to replace the target rule set; and continue to select a new target rule set from the rule set group, until the number of rule sets in the rule set group reaches a preset number.Type: ApplicationFiled: April 29, 2016Publication date: May 31, 2018Inventors: Dawei Xu, Chushun Wei, Kai Ren
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Patent number: 9522521Abstract: In various embodiments, an apparatus for separating a stacked arrangement including a first layer, a second layer and a release layer between the first layer and the second layer may be provided. The apparatus may include an attachment surface configured to suspend the stacked arrangement by attaching to the first layer. The apparatus may further include an actuating mechanism configured to form a curvature of the first layer by bending the attachment surface. The apparatus may also include a holder to hold an etchant for etching the release layer to separate the first layer from the second layer.Type: GrantFiled: April 17, 2013Date of Patent: December 20, 2016Assignee: Nanyang Technological UniversityInventors: Soon Fatt Yoon, Dawei Xu, Chiew Yong Yeo
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Publication number: 20150053352Abstract: In various embodiments, an apparatus for separating a stacked arrangement including a first layer, a second layer and a release layer between the first layer and the second layer may be provided. The apparatus may include an attachment surface configured to suspend the stacked arrangement by attaching to the first layer. The apparatus may further include an actuating mechanism configured to form a curvature of the first layer by bending the attachment surface. The apparatus may also include a holder to hold an etchant for etching the release layer to separate the first layer from the second layer.Type: ApplicationFiled: April 17, 2013Publication date: February 26, 2015Inventors: Soon Fatt Yoon, Dawei Xu, Chiew Yong Yeo
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Patent number: 8460976Abstract: The present invention relates to a manufacturing method of SOI devices, and in particular, to a manufacturing method of SOI high-voltage power devices.Type: GrantFiled: September 7, 2010Date of Patent: June 11, 2013Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of SciencesInventors: Xinhong Cheng, Zhongjian Wang, Yuehui Yu, Dawei He, Dawei Xu, Chao Xia
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Patent number: 8377755Abstract: A method of manufacturing a SOI high voltage power chip with trenches is disclosed. The method comprises: forming a cave and trenches at a SOI substrate; filling oxide in the cave; oxidizing the trenches, forming oxide isolation regions for separating low voltage devices at the same time; filling oxide in the oxidized trenches; and then forming drain regions, source regions and gate regions for a high voltage power device and low voltage devices. The process involves depositing an oxide layer overlapping the cave of the SOI substrate. A SOI high voltage power chip thus made will withstand at least above 700V voltage.Type: GrantFiled: September 7, 2010Date of Patent: February 19, 2013Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of SciencesInventors: Xinhong Cheng, Zhongjian Wang, Yuehui Yu, Dawei He, Dawei Xu, Chao Xia
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Patent number: 8357362Abstract: Use of IL-6 for treating non-hematopoietic cancers, e.g., gp130-negative cancers. Also disclosed is a method for identifying a cancer patient suitable for the IL-6 treatment.Type: GrantFiled: June 7, 2012Date of Patent: January 22, 2013Assignee: Bionewpath LLCInventor: Dawei Xu
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Patent number: 8354330Abstract: The present invention relates to a method of fabricating an SOI SJ LDMOS structure that can completely eliminate the substrate-assisted depletion effects, comprising the following steps: step one: a conducting layer is prepared below the SOI BOX layer using the bonding technique; the conducting layer is prepared in the following way: depositing a barrier layer on a first bulk silicon wafer, and then depositing a charge conducting layer, thereby obtaining a first intermediate structure; forming a silicon dioxide layer on a second bulk silicon wafer via thermal oxidation, then depositing a barrier layer, and finally depositing a charge conducting layer, thereby obtaining a second intermediate structure; bonding the first intermediate structure and the second intermediate structure using the metal bonding technology to arrange the conducting layer below the SOI BOX layer; step two: a SJ LDMOS structure is fabricated on the SOI substrate having a conducting layer.Type: GrantFiled: December 15, 2010Date of Patent: January 15, 2013Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of SciencesInventors: Xinhong Cheng, Dawei He, Zhongjian Wang, Dawei Xu, Chao Xia, Zhaorui Song, Yuehui Yu
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Publication number: 20120276718Abstract: The present invention provides a method of fabricating a graphene-based field effect transistor, which includes steps of: providing a semiconductor substrate on which a non-functionized graphene layer is formed; forming a metal oxide film as a nucleation layer through a reaction between a metal source and water which acts as oxidizer and is physically absorbed to a surface of the graphene layer; and generating a HfO2 gate dielectric layer through a reaction between a hafnium source and water acting as oxidizer by using the nucealtion layer. In comparison with the prior art, the method of the present invention is mainly characterized in that the metal oxide film acting as the nucleation layer is formed through a reaction between the metal source and water which acts as oxidizer and is physically absorbed to the surface of graphene.Type: ApplicationFiled: June 8, 2011Publication date: November 1, 2012Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMYInventors: Xinhong Cheng, Youwei Zhang, Dawei Xu, Zhongjian Wang, Chao Xia, Dawei He, Yuehui Yu
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Publication number: 20120273861Abstract: The present invention relates to a method of depositing a gate dielectric, a method of preparing a MIS capacitor and the MIS capacitor. In the method of depositing the gate dielectric, a semiconductor substrate surface is preprocessed with oxygen plasma and nitrogen-containing plasma to form a nitrogen-containing oxide layer thereon. Then, a high-k gate dielectric layer is grown on the nitrogen-containing oxide layer surface by a plasma-enhanced atomic layer deposition process, and the oxide layer converts during the gate dielectric layer growth process into a buffer layer of a dielectric constant higher than SiO2. Then, a metal electrode is formed on both an upper layer and a lower layer of the thus-formed semiconductor construction, so that a MIS capacitor is prepared.Type: ApplicationFiled: June 8, 2011Publication date: November 1, 2012Applicant: SHANGHAN INSTITUTE OF MICROSYSTEM AND IMFORMATION TECHNOLOGY,CHINESE ACADEMInventors: Xinhong Cheng, Dawei Xu, Zhongjian Wang, Chao Xia, Dawei He, Zhaorui Song, Yuehui Yu
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Publication number: 20120244115Abstract: Use of IL-6 for treating non-hematopoietic cancers, e.g., gp130-negative cancers. Also disclosed is a method for identifying a cancer patient suitable for the IL-6 treatment.Type: ApplicationFiled: June 7, 2012Publication date: September 27, 2012Applicant: Bionewpath LLCInventor: Dawei XU
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Patent number: 8216562Abstract: Use of IL-6 for treating non-hematopoietic cancers, e.g., gp130-negative cancers. Also disclosed is a method for identifying a cancer patient suitable for the IL-6 treatment.Type: GrantFiled: July 5, 2011Date of Patent: July 10, 2012Assignee: Bionewpath LLCInventor: Dawei Xu
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Publication number: 20120058608Abstract: The present invention relates to a method of fabricating an SOI SJ LDMOS structure that can completely eliminate the substrate-assisted depletion effects, comprising the following steps: step one: a conducting layer is prepared below the SOI BOX layer using the bonding technique; the conducting layer is prepared in the following way: depositing a barrier layer on a first bulk silicon wafer, and then depositing a charge conducting layer, thereby obtaining a first intermediate structure; forming a silicon dioxide layer on a second bulk silicon wafer via thermal oxidation, then depositing a barrier layer, and finally depositing a charge conducting layer, thereby obtaining a second intermediate structure; bonding the first intermediate structure and the second intermediate structure using the metal bonding technology to arrange the conducting layer below the SOI BOX layer; step two: a SJ LDMOS structure is fabricated on the SOI substrate having a conducting layer.Type: ApplicationFiled: December 15, 2010Publication date: March 8, 2012Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMYInventors: Xinhong Cheng, Dawei He, Zhongjian Wang, Dawei Xu, Chao Xia, Zhaorui Son, Yuehui Yu
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Publication number: 20120021569Abstract: The present invention relates to a manufacturing method of SOI devices, and in particular, to a manufacturing method of SOI high-voltage power devices.Type: ApplicationFiled: September 7, 2010Publication date: January 26, 2012Applicant: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCESInventors: Xinhong Cheng, Zhongjian Wang, Yuehui Yu, Dawei He, Dawei Xu, Chao Xia