Abstract: Disclosed herein are methods of annealing a perovskite layer, comprising irradiating the perovskite layer with a light source, wherein the light source is a UV light emitting diode or array of UV-LEDs for rapid and large-area exposure without scanning over the perovskite film, wherein the light source emits radiation consisting essentially of wavelengths within 50 nm of the wavelength of maximum absorbance (?max) of the perovskite layer, thereby annealing the perovskite layer. Also disclosed herein are semiconducting devices and articles of manufacture comprising an annealed perovskite layer made by any of the methods described herein, such as solar cells, light-emitting diodes, photodetectors, thin-film transistors, laser diodes, and combinations thereof.

Abstract: Disclosed herein are methods of annealing a perovskite layer, comprising irradiating the perovskite layer with a light source, wherein the light source emits radiation consisting essentially of wavelengths within 50 nm of the wavelength of maximum absorbance (?max) of the perovskite layer, thereby annealing the perovskite layer. Also disclosed herein are semiconducting devices and articles of manufacture comprising an annealed perovskite layer made by any of the methods described herein, such as solar cells, light-emitting diodes, photodetectors, thin-film transistors, and combinations thereof.

Abstract: Methods of annealing and/or sintering a transparent conductive oxide (TCO) film disclosed, and wherein the TCO film comprises indium tin oxide film (ITO), fluorine-doped tin film (FTO), indium doped zinc oxide (IZO), or aluminum-doped zinc oxide (AZO). Such methods involve irradiating the TCO film with a light source and where the annealing and/or sintering is selective to the TCO film.

Abstract: A non-maximum suppression operation device and system; the non-maximum suppression operation device includes: a data access module to import external data or export a non-maximum suppression computation result of the external data; a control module to send a control signal for performing a computation on the external data; and an operation module to perform an intersection-over-union computation on the external data on the basis of the control signal to obtain an intersection-over-union computation result, and to compare the intersection-over-union computation result with a preset threshold value to obtain the non-maximum suppression computation result.

Abstract: Methods of forming a perovskite-containing film comprising depositing one or more metal oxide layers onto a substrate; and irradiating each metal oxide layer with a UV LED light source after deposition to sinter and/or anneal a target metal oxide in the one or more metal oxide layers without damaging the underlying substrate or perovskite material. The LED light source can be selected to emit a narrow spectral width of pulsed radiation. The radiation emitted can consist essentially of wavelengths within 20 nm of the wavelength of maximum absorbance (?max) of the target metal oxide, that is, wavelength from UV LED can be ?max±20 nm, to achieve layer-specific annealing and sintering of metal oxide charge transport layer. The target metal oxide can include tin oxide in the electron transport layer or nickel oxide in the hole transport layer. Perovskite-containing films formed from the methods described herein are also disclosed.

Abstract: Disclosed herein are methods of annealing a perovskite layer, comprising irradiating the perovskite layer with a light source, wherein the light source emits radiation consisting essentially of wavelengths within 50 nm of the wavelength of maximum absorbance (?max) of the perovskite layer, thereby annealing the perovskite layer. Also disclosed herein are semiconducting devices and articles of manufacture comprising an annealed perovskite layer made by any of the methods described herein, such as solar cells, light-emitting diodes, photodetectors, thin-film transistors, and combinations thereof.

Abstract: A non-maximum suppression operation device and system; the non-maximum suppression operation device includes: a data access module to import external data or export a non-maximum suppression computation result of the external data; a control module to send a control signal for performing a computation on the external data; and an operation module to perform an intersection-over-union computation on the external data on the basis of the control signal to obtain an intersection-over-union computation result, and to compare the intersection-over-union computation result with a preset threshold value to obtain the non-maximum suppression computation result.

Abstract: Methods of forming a perovskite-containing film comprising depositing one or more metal oxide layers onto a substrate; and irradiating each metal oxide layer with a UV LED light source after deposition to sinter and/or anneal a target metal oxide in the one or more metal oxide layers without damaging the underlying substrate or perovskite material. The LED light source can be selected to emit a narrow spectral width of pulsed radiation. The radiation emitted can consist essentially of wavelengths within 20 nm of the wavelength of maximum absorbance (?max) of the target metal oxide, that is, wavelength from UV LED can be ?max±20 nm, to achieve layer-specific annealing and sintering of metal oxide charge transport layer. The target metal oxide can include tin oxide in the electron transport layer or nickel oxide in the hole transport layer. Perovskite-containing films formed from the methods described herein are also disclosed.

Abstract: Disclosed herein are temperature-gradient methods of producing well-oriented TIPS pentacene crystals and films comprising establishing a temperature gradient on a substrate to produce a heated substrate having a lower temperature portion at a first temperature and a higher temperature portion at a second temperature and applying a solution comprising 6,13-bis(triisopropylsilylethynyl)pentacene to the heated substrate, driving crystallization from the lower temperature portion of the substrate to the higher temperature portion of the substrate.

Abstract: The present invention provides a dual organic field-effect transistor (OFET) structure and a method of fabricating the structure. The dual OFET structure includes an n-type organic semiconductor layer and a p-type organic semiconductor layer in contact with each other along an interface and forming a stack. The dual OFET structure also includes a source electrode and a drain electrode, the source and drain electrodes being in contact with one of the organic semiconductor layers. The dual OFET structure further includes first and second gate structures located on opposite sides of the stack. The first gate structure is configured to control a channel region of the n-type organic semiconductor layer, and the second gate structure is configured to control a channel region of the p-type organic semiconductor layer.

Abstract: The present invention provides a dual organic field-effect transistor (OFET) structure and a method of fabricating the structure. The dual OFET structure includes an n-type organic semiconductor layer and a p-type organic semiconductor layer in contact with each other along an interface and forming a stack. The dual OFET structure also includes a source electrode and a drain electrode, the source and drain electrodes being in contact with one of the organic semiconductor layers. The dual OFET structure further includes first and second gate structures located on opposite sides of the stack. The first gate structure is configured to control a channel region of the n-type organic semiconductor layer, and the second gate structure is configured to control a channel region of the p-type organic semiconductor layer.

Abstract: The present invention provides a dual organic field-effect transistor (OFET) structure and a method of fabricating the structure. The dual OFET structure includes an n-type organic semiconductor layer and a p-type organic semiconductor layer in contact with each other along an interface and forming a stack. The dual OFET structure also includes a source electrode and a drain electrode, the source and drain electrodes being in contact with one of the organic semiconductor layers. The dual OFET structure further includes first and second gate structures located on opposite sides of the stack. The first gate structure is configured to control a channel region of the n-type organic semiconductor layer, and the second gate structure is configured to control a channel region of the p-type organic semiconductor layer.

Abstract: The present invention provides a dual organic field-effect transistor (OFET) structure and a method of fabricating the structure. The dual OFET structure includes an n-type organic semiconductor layer and a p-type organic semiconductor layer in contact with each other along an interface and forming a stack. The dual OFET structure also includes a source electrode and a drain electrode, the source and drain electrodes being in contact with one of the organic semiconductor layers. The dual OFET structure further includes first and second gate structures located on opposite sides of the stack. The first gate structure is configured to control a channel region of the n-type organic semiconductor layer, and the second gate structure is configured to control a channel region of the p-type organic semiconductor layer.