Patents by Inventor Dawn Michelle Lee

Dawn Michelle Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures
    Patent number: 6713394
    Abstract: A planarization process for an integrated circuit structure which inhibits or prevents cracking of low k dielectric material which comprises one of one or more layers of dielectric material formed over raised portions of the underlying integrated circuit structure. Prior to the planarization step, a removable mask is formed over such one or more dielectric layers formed over raised portions of the integrated circuit structure. Openings are formed in the mask to expose a portion of the upper surface of the one or more dielectric layers in the region over at least some of these raised portions of the integrated circuit structure. Exposed portions of the underlying one or more dielectric layers are then etched through such openings in the mask to reduce the overall amount of the one or more dielectric layers overlying such raised portions of the integrated circuit structure.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: March 30, 2004
    Assignee: LSI Logic Corporation
    Inventors: Ronald J. Nagahara, Jayanthi Pallinti, Dawn Michelle Lee
  • Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures
    Publication number: 20030017704
    Abstract: A planarization process for an integrated circuit structure which inhibits or prevents cracking of low k dielectric material which comprises one of one or more layers of dielectric material formed over raised portions of the underlying integrated circuit structure. Prior to the planarization step, a removable mask is formed over such one or more dielectric layers formed over raised portions of the integrated circuit structure. Openings are formed in the mask to expose a portion of the upper surface of the one or more dielectric layers in the region over at least some of these raised portions of the integrated circuit structure. Exposed portions of the underlying one or more dielectric layers are then etched through such openings in the mask to reduce the overall amount of the one or more dielectric layers overlying such raised portions of the integrated circuit structure.
    Type: Application
    Filed: September 24, 2002
    Publication date: January 23, 2003
    Inventors: Ronald J. Nagahara, Jayanthi Pallinti, Dawn Michelle Lee
  • Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures
    Patent number: 6489242
    Abstract: A planarization process for an integrated circuit structure which inhibits or prevents cracking of low k dielectric material which comprises one of one or more layers of dielectric material formed over raised portions of the underlying integrated circuit structure. Prior to the planarization step, a removable mask is formed over such one or more dielectric layers formed over raised portions of the integrated circuit structure. Openings are formed in the mask to expose a portion of the upper surface of the one or more dielectric layers in the region over at least some of these raised portions of the integrated circuit structure. Exposed portions of the underlying one or more dielectric layers are then etched through such openings in the mask to reduce the overall amount of the one or more dielectric layers overlying such raised portions of the integrated circuit structure.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: December 3, 2002
    Assignee: LSI Logic Corporation
    Inventors: Ronald J. Nagahara, Jayanthi Pallinti, Dawn Michelle Lee