Patents by Inventor Dawn Ritz

Dawn Ritz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10788531
    Abstract: An improved package device simulator for the testing of testing sockets, the package device simulator being formed of a first layer of non-conductive rigid substrate with a second layer formed of a plurality of electrically conductive traces being added thereto. A third layer of non-conductive rigid substrate is adhered to the first layer with the second layer being sealed there between. The third layer having a plurality of openings therein, wherein the openings align with and expose a portion of the electrically conductive traces of the second layer. Conductive binding material and contact balls are added to the openings and the chip is cured thereby fusing the contact balls with the exposed portions of the traces. Next, the exposed surfaces are coated with a hardening conductive material, such as layers of Nickel and/or Gold. In this way an improved package device simulator is formed that is durable, easier to manufacture and less expensive than a solid metallic package device simulator.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: September 29, 2020
    Assignee: MODUS TEST, LLC
    Inventors: Lynwood Adams, Bruce Rogers, Jack Lewis, Tim Conner, Jay Williams, Mike Young, Dawn Ritz
  • Publication number: 20160124021
    Abstract: An improved package device simulator for the testing of testing sockets, the package device simulator being formed of a first layer of non-conductive rigid substrate with a second layer formed of a plurality of electrically conductive traces being added thereto. A third layer of non-conductive rigid substrate is adhered to the first layer with the second layer being sealed there between. The third layer having a plurality of openings therein, wherein the openings align with and expose a portion of the electrically conductive traces of the second layer. Conductive binding material and contact balls are added to the openings and the chip is cured thereby fusing the contact balls with the exposed portions of the traces. Next, the exposed surfaces are coated with a hardening conductive material, such as layers of Nickel and/or Gold. In this way an improved package device simulator is formed that is durable, easier to manufacture and less expensive than a solid metallic package device simulator.
    Type: Application
    Filed: October 29, 2015
    Publication date: May 5, 2016
    Inventors: Lynwood Adams, Bruce Rogers, Jack Lewis, Tim Conner, Jay Williams, Mike Young, Dawn Ritz