Patents by Inventor DaXue Xu

DaXue Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6785033
    Abstract: The present invention provides, in one aspect, an optical device, a method of manufacture therefor, and an optical system including the same. The optical device may include a membrane configured to be electrically deformable and reflective. The membrane may further be positioned over a cavity located within a substrate. The device may additionally include a transmissive spacer coupled to the substrate, and a lens coupled to the transmissive spacer and optically aligned with the membrane.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: August 31, 2004
    Assignees: Agere Systems Inc., TriQuint Technology Holding Inc.
    Inventors: Mark M. Meyers, Daxue Xu
  • Publication number: 20030165026
    Abstract: The present invention provides, in one aspect, an optical device, a method of manufacture therefor, and an optical system including the same. The optical device may include a membrane configured to be electrically deformable and reflective. The membrane may further be positioned over a cavity located within a substrate. The device may additionally include a transmissive spacer coupled to the substrate, and a lens coupled to the transmissive spacer and optically aligned with the membrane.
    Type: Application
    Filed: March 1, 2002
    Publication date: September 4, 2003
    Applicant: Agere Systems Inc.
    Inventors: Mark M. Meyers, Daxue Xu
  • Patent number: 6514789
    Abstract: A component (10) includes a substrate (15), a cap wafer (23), and a protection layer (28) formed over a surface of the cap wafer (23). Together, the protection layer (28) and the cap wafer (23) form a cap structure (39) that is bonded to the substrate (15) via a bonding layer (33). An opening (47) is formed in the cap wafer (23) by etching the cap wafer (23). The protection layer (28) provides protection during etching of the cap wafer (23) for the underlying bonding layer (33) and devices (11,12) formed in the substrate (15).
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: February 4, 2003
    Assignee: Motorola, Inc.
    Inventors: Heidi L. Denton, Henry G. Hughes, Thor D. Osborn, DaXue Xu
  • Publication number: 20020171131
    Abstract: A component (10) includes a substrate (15), a cap wafer (23), and a protection layer (28) formed over a surface of the cap wafer (23). Together, the protection layer (28) and the cap wafer (23) form a cap structure (39) that is bonded to the substrate (15) via a bonding layer (33). An opening (47) is formed in the cap wafer (23) by etching the cap wafer (23). The protection layer (28) provides protection during etching of the cap wafer (23) for the underlying bonding layer (33) and devices (11,12) formed in the substrate (15).
    Type: Application
    Filed: October 26, 1999
    Publication date: November 21, 2002
    Inventors: HEIDI L. DENTON, HENRY G. HUGHES, THOR D. OSBORN, DAXUE XU
  • Patent number: 6465281
    Abstract: A semiconductor wafer level package used to encapsulate a device fabricated on a semiconductor substrate wafer before dicing of the wafer into individual chips. A cap wafer may be bonded to the semiconductor substrate using a low temperature frit glass layer as a bonding agent. The frit glass layer is in direct contact with the device. A hermetic seal is formed by a combination of the semiconductor substrate wafer, the cap wafer and the frit glass layer. A second embodiment of the package does not contain a cap wafer.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: October 15, 2002
    Assignee: Motorola, Inc.
    Inventors: DaXue Xu, Henry G. Hughes, Paul Bergstrom, Frank A. Shemansky, Jr., Hak-Yam Tsoi