Patents by Inventor Daying Lin
Daying Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220280403Abstract: An aqueous oleanolic acid solution, including from about 0.10 to 2.5 weight % oleanolic acid, from about 60 to 90 weight % solvent, and from about 20 to 40 weight % solubility agent, wherein the solvent includes water, the solubility agent includes sodium lauryl sulfate (SLS), and the aqueous oleanolic acid solution is substantially free of ethanol and dimethyl sulfoxide (DMSO).Type: ApplicationFiled: August 23, 2019Publication date: September 8, 2022Applicant: Colgate-Palmolive CompanyInventors: Shao Peng XU, Yuan Hui XIE, Dai Lin CHEN
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Patent number: 11260004Abstract: An oral care composition, including a mixture of antibacterial agents, the mixture of antibacterial agents including oleanic acid and eugenol at a 2:1 to 3:1 weight ratio.Type: GrantFiled: May 31, 2019Date of Patent: March 1, 2022Assignee: Colgate-Palmolive CompanyInventors: Shao Peng Xu, Dai Lin Chen, Neelima Utgikar
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Publication number: 20200378881Abstract: An in-vitro platelet evaluation method, including creating a platelet suspension sample and flowing the platelet suspension sample through an evaluation system to determine a platelet aggregation area and a platelet rolling velocity.Type: ApplicationFiled: May 31, 2019Publication date: December 3, 2020Inventors: Shao Peng XU, Dai Lin CHEN
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Publication number: 20200375859Abstract: An oral care composition, including a mixture of antibacterial agents, the mixture of antibacterial agents including oleanic acid and eugenol at a 2:1 to 3:1 weight ratio.Type: ApplicationFiled: May 31, 2019Publication date: December 3, 2020Inventors: Shao Peng XU, Dai Lin CHEN, Neelima UTGIKAR
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Patent number: 10269581Abstract: A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.Type: GrantFiled: October 2, 2017Date of Patent: April 23, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Yen Hsieh, Ming-Ching Chang, Chia-Wei Chang, Chao-Cheng Chen, Chun-Hung Lee, Dai-Lin Wu
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Publication number: 20180047585Abstract: A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.Type: ApplicationFiled: October 2, 2017Publication date: February 15, 2018Inventors: Tzu-Yen HSIEH, Ming-Ching CHANG, Chia-Wei CHANG, Chao-Cheng CHEN, Chun-Hung LEE, Dai-Lin WU
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Patent number: 9870954Abstract: A method includes forming a first gate stack and a second gate stack over a first portion and a second portion, respectively, of a semiconductor substrate, masking the first portion of the semiconductor substrate, and with the first portion of the semiconductor substrate being masked, implanting the second portion of the semiconductor substrate with an etch-tuning element. The first portion and the second portion of the semiconductor substrate are etched simultaneously to form a first opening and a second opening, respectively, in the semiconductor substrate. The method further includes epitaxially growing a first semiconductor region in the first opening, and epitaxially growing a second semiconductor region in the second opening.Type: GrantFiled: February 2, 2016Date of Patent: January 16, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Eric Chih-Fang Liu, Srisuda Thitinun, Dai-Lin Wu, Ryan Chia-Jen Chen, Chao-Cheng Chen
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Patent number: 9779963Abstract: A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.Type: GrantFiled: July 30, 2015Date of Patent: October 3, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Yen Hsieh, Ming-Ching Chang, Chia-Wei Chang, Chao-Cheng Chen, Chun-Hung Lee, Dai-Lin Wu
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Publication number: 20160155672Abstract: A method includes forming a first gate stack and a second gate stack over a first portion and a second portion, respectively, of a semiconductor substrate, masking the first portion of the semiconductor substrate, and with the first portion of the semiconductor substrate being masked, implanting the second portion of the semiconductor substrate with an etch-tuning element. The first portion and the second portion of the semiconductor substrate are etched simultaneously to form a first opening and a second opening, respectively, in the semiconductor substrate. The method further includes epitaxially growing a first semiconductor region in the first opening, and epitaxially growing a second semiconductor region in the second opening.Type: ApplicationFiled: February 2, 2016Publication date: June 2, 2016Inventors: Eric Chih-Fang Liu, Srisuda Thitinun, Dai-Lin Wu, Ryan Chia-Jen Chen, Chao-Cheng Chen
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Patent number: 9263551Abstract: A method includes forming a first gate stack and a second gate stack over a first portion and a second portion, respectively, of a semiconductor substrate, masking the first portion of the semiconductor substrate, and with the first portion of the semiconductor substrate being masked, implanting the second portion of the semiconductor substrate with an etch-tuning element. The first portion and the second portion of the semiconductor substrate are etched simultaneously to form a first opening and a second opening, respectively, in the semiconductor substrate. The method further includes epitaxially growing a first semiconductor region in the first opening, and epitaxially growing a second semiconductor region in the second opening.Type: GrantFiled: October 11, 2013Date of Patent: February 16, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Eric Chih-Fang Liu, Srisuda Thitinun, Dai-Lin Wu, Ryan Chia-Jen Chen, Chao-Cheng Chen
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Publication number: 20150332935Abstract: A method of making a semiconductor structure, the method including forming a conductive layer over a substrate. The method further includes forming a first imaging layer over the conductive layer, where the first imaging layer comprises a plurality of layers. The method further includes forming openings in the first imaging layer to expose a first set of areas of the conductive layer. The method further includes implanting ions into each area of the first set of area. The method further includes forming a second imaging layer over the conductive layer. The method further includes forming openings in the second imaging layer to expose a second set of areas of the conductive layer, wherein the second set of areas is different from the first set of areas. The method further includes implanting ions into the each area of the second set of areas.Type: ApplicationFiled: July 30, 2015Publication date: November 19, 2015Inventors: Tzu-Yen HSIEH, Ming-Ching CHANG, Chia-Wei CHANG, Chao-Cheng CHEN, Chun-Hung LEE, Dai-Lin WU
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Patent number: 9111861Abstract: An embodiment of the current disclosure includes a method of providing a substrate, forming a polysilicon layer over the substrate, forming a first photoresist layer on the polysislicon layer, creating a first pattern on the first photoresist layer, wherein some portions of the polysilicon layer are covered by the first photoresist layer and some portions of the polysilicon layer are not covered by the first photoresist layer, implanting ions into the portions of the polysilicon layer that are not covered by the first photoresist layer, removing the first photoresist layer from the polysilicon layer, forming a second photoresist layer on the polysilicon layer, creating a second pattern on the second photoresist layer, and implanting ions into the portions of the polysilicon layer that are not covered by the second photoresist layer, removing the second photoresist layer from the polysilicon layer, and removing portions of the polysilicon layer using an etchant.Type: GrantFiled: February 6, 2012Date of Patent: August 18, 2015Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tzu-Yen Hsieh, Ming-Ching Chang, Chia-Wei Chang, Chao-Cheng Chen, Chun-Hung Lee, Dai-Lin Wu
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Publication number: 20150104913Abstract: A method includes forming a first gate stack and a second gate stack over a first portion and a second portion, respectively, of a semiconductor substrate, masking the first portion of the semiconductor substrate, and with the first portion of the semiconductor substrate being masked, implanting the second portion of the semiconductor substrate with an etch-tuning element. The first portion and the second portion of the semiconductor substrate are etched simultaneously to form a first opening and a second opening, respectively, in the semiconductor substrate. The method further includes epitaxially growing a first semiconductor region in the first opening, and epitaxially growing a second semiconductor region in the second opening.Type: ApplicationFiled: October 11, 2013Publication date: April 16, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Eric Chih-Fang Liu, Srisuda Thitinun, Dai-Lin Wu, Ryan Chia-Jen Chen, Chao-Cheng Chen
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Publication number: 20130203247Abstract: An embodiment of the current disclosure includes a method of providing a substrate, forming a polysilicon layer over the substrate, forming a first photoresist layer on the polysislicon layer, creating a first pattern on the first photoresistlayer, wherein some portions of the polysilicon layer are covered by the first photoresist layer and some portions of the polysilicon layer are not covered by the first photoresist layer, implanting ions into the portions of the polysilicon layer that are not covered by the first photoresist layer, removing the first photoresist layer from the polysilicon layer, forming a second photoresist layer on the polysilicon layer, creating a second pattern on the second photoresistlayer, and implanting ions into the portions of the polysilicon layer that are not covered by the second photoresist layer, removing the second photoresist layer from the polysilicon layer, and removing portions of the polysilicon layer using an etchant.Type: ApplicationFiled: February 6, 2012Publication date: August 8, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tzu-Yen HSIEH, Ming-Ching CHANG, Chia-Wei CHANG, Chao-Cheng CHEN, Chun-Hung LEE, Dai-Lin WU
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Patent number: D988169Type: GrantFiled: January 17, 2023Date of Patent: June 6, 2023Assignee: Shenzhen Jucai Technology Co., Ltd.Inventor: Daying Lin