Abstract: A method for a treatment of hyperplasia caused by papilloma virus, such as Condyloma acuminata, which comprises concomitantly topically and orally administering at least one tea catechin. Tea catechins do not involve the risk of side-effects and may be easily administered by the patients themselves.

Abstract: A process for manufacturing a phosphorescent screen for use in a cathode ray or field emission display, is described. The phosphor layer is applied in the form of a slurry consisting of a powdered phosphor, an ethylene glycol monobutyl ether acetate solvent, and a cellulose acetate butyrate binder. The phosphor concentration is between 30 and 60% by weight, the solvent between 5 and 52.5% and the binder between 17.5 and 35%. If the slurry composition falls within these ranges, then, once the aluminum anode layer is in place, all organic material can be removed by firing at a temperature that is less than 500.degree. C. By keeping the firing temperature below 500.degree. C., roughening of the undersurface of the aluminum is avoided and a more efficient screen is obtained. Data to illustrate this is also provided.

Abstract: A formulation of solid powder, a solvent system, a binder material, and a plasticizing agent is described whose accomplishment is achieved by means of a step-by-step process. The pastes so formulated can be employed in a screen printing process to produce surface layer patterns with various specific physical properties such as phosphorescence, electrical conductivity, mechanical adhesion, and dielectric properties as desired.

Abstract: A method for a treatment of hyperplasia caused by papilloma virus, such as for treating Condyloma acuminata which comprises administering tea catechin. Tea catechins do not involve the risk of side-effects and may be easily applied to or inserted in the infected area by the patients themselves.

Abstract: A control assembly for a pump includes a ripple-effect removing valve and a pressure detecting device. The ripple-effect removing valve includes a casing having a lower inlet end in fluid communication with a hollow body of the pump, an upper outlet end and an interior fluid passage which fluidly communicates the inlet and outlet ends and which includes a generally upright lower section with a top opening, a generally upright upper section with a bottom opening, and a substantially horizontal intermediate section fluidly communicating the upper and lower sections. The valve further includes a regulator for controlling fluid flow from the lower section to the upper section. The pressure detecting device is fluidly communicated with the upper outlet end of the casing, and deactivates an impeller unit of the pump when the pressure of the fluid entering the pressure detecting device via the fluid passage of the casing reaches a predetermined value.

Abstract: Two embodiments of a method for metallizing a phosphor layer are presented. The key to the method is covering the phosphor with a temporary planarizing layer onto which the metallizing layer (typically aluminum) is then deposited. Once the metal layer is in place, the planarizing layer is removed (by a burning process), the metal then making good contact with the phosphor and the substrate. In the first embodiment, the dry film is located below the phosphor layer while in the second embodiment it is located above it.

Abstract: A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages. Portions of each of the source and drain regions overlap with the first gate dielectric layer, and the interpoly dielectric layer is chosen to have a high dielectric constant so as to maximize the capacitive coupling ratio between floating gate, control gate, source, and drain. The logical condition of cells in the array is set by first elevating a block of cells to a high voltage threshold and by individually lowering the voltage threshold of selected cells.

Abstract: A formulation of solid powder, a solvent system, a binder material, and a plasticizing agent is described whose accomplishment is achieved by means of a step-by-step process. The pastes so formulated can be employed in a screen printing process to produce surface layer patterns with various specific physical properties such as phosphorescence, electrical conductivity, mechanical adhesion, and dielectric properties as desired.

Abstract: A method for treating cancer in a patient by administering to a patient an nti-cancer effective amount of an anti-metabolite selected from the group consisting of 1-.beta.-arabinofuranosylcytosine and 4-amino-4-deoxy-10-methylfolic acid and an anti-oxidant effective amount of a tea polyphenol compound selected from the group consisting of a tea catechin, a theaflavin and a combination of a tea catechin and a theaflavin.

Abstract: A composition for a treatment of HPV-infected Condyloma acuminata which comprises containing tea catechin as a main component. This medication has no danger of side-effects and may be easily applied to or inserted in the infected area by the patient themselves.

Abstract: An improved method of screen printing is described wherein a double sided tape (dry film) is applied between the substrate and the screened-on paste. Since the dry film ensures the adhesion of the paste, no minimum thickness of paste is needed to attain good adhesion. By applying a thin layer of paste multiple times any thickness over a wide range can be obtained. Once the desired thickness of paste has been applied, the dry film is removed by firing in an oxidizing atmosphere. The method is applicable to, among others, phosphors, resistive materials, and conductive materials.

Abstract: A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages. Portions of each of the source and drain regions overlap with the first gate dielectric layer, and the interpoly dielectric layer is chosen to have a high dielectric constant so as to maximize the capacitive coupling ratio between floating gate, control gate, source, and drain. The logical condition of cells in the array is set by first elevating a block of cells to a high voltage threshold and by individually lowering the voltage threshold of selected cells.

Abstract: A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages. Portions of each of the source and drain regions overlap with the first gate dielectric layer, and the interpoly dielectric layer is chosen to have a high dielectric constant so as to maximize the capacitive coupling ratio between floating gate, control gate, source, and drain. The logical condition of cells in the array is set by first elevating a block of cells to a high voltage threshold and by individually lowering the voltage threshold of selected cells.

Abstract: A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages. Portions of each of the source and drain regions overlap with the first gate dielectric layer, and the interpoly dielectric layer is chosen to have a high dielectric constant so as to maximize the capacitive coupling ratio between floating gate, control gate, source, and drain. The logical condition of cells in the array is set by first elevating a block of cells to a high voltage threshold and by individually lowering the voltage threshold of selected cells.

Abstract: A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages. Portions of each of the source and drain regions overlap with the first gate dielectric layer, and the interpoly dielectric layer is chosen to have a high dielectric constant so as to maximize the capacitive coupling ratio between floating gate, control gate, source, and drain. The logical condition of cells in the array is set by first elevating a block of cells to a high voltage threshold and by individually lowering the voltage threshold of selected cells.