Patents by Inventor De Biao HE

De Biao HE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210398976
    Abstract: Semiconductor structure is provided. The semiconductor structure includes a substrate including device regions and an isolation region located adjacent to and between the device regions; a fin on the substrate; gate structures across the fin at the device regions; source/drain doped regions in the fin at two sides of each of the gate structures; a first opening in the fin at the isolation region; and an insulation structure located in the first opening. Two opposite sidewalls of the first opening are respectively in contact with the source/drain doped regions at adjacent device regions. A top surface of the insulation structure is flush with or higher than top surfaces of the source/drain doped regions.
    Type: Application
    Filed: September 8, 2021
    Publication date: December 23, 2021
    Inventors: Wu Feng DENG, De Biao HE, Chang Yong XIAO
  • Patent number: 11139294
    Abstract: Semiconductor structure and method for fabricating a semiconductor structure are provided. A substrate including device regions and an isolation region located adjacent to and between the device regions is provided. A fin on the substrate, gate structures across the fin at the device regions, source/drain doped regions in the fin at two sides of each of the gate structures, and a sacrificial gate across the fin at the isolation region are provided. The sacrificial gate and a portion of the fin near a bottom of the sacrificial gate are removed, thus forming a first opening in the fin. An insulation structure in the first opening is formed. Two sides of the sacrificial gate are in contact with the source/drain doped regions at adjacent device regions. A top surface of the insulation structure is flush with or higher than top surfaces of the source/drain doped regions.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: October 5, 2021
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Wu Feng Deng, De Biao He, Chang Yong Xiao
  • Publication number: 20190355720
    Abstract: Semiconductor structure and method for fabricating a semiconductor structure are provided. A substrate including device regions and an isolation region located adjacent to and between the device regions is provided. A fin on the substrate, gate structures across the fin at the device regions, source/drain doped regions in the fin at two sides of each of the gate structures, and a sacrificial gate across the fin at the isolation region are provided. The sacrificial gate and a portion of the fin near a bottom of the sacrificial gate are removed, thus forming a first opening in the fin. An insulation structure in the first opening is formed. Two sides of the sacrificial gate are in contact with the source/drain doped regions at adjacent device regions. A top surface of the insulation structure is flush with or higher than top surfaces of the source/drain doped regions.
    Type: Application
    Filed: May 20, 2019
    Publication date: November 21, 2019
    Inventors: Wu Feng DENG, De Biao HE, Chang Yong XIAO