Patents by Inventor De LIN

De LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967526
    Abstract: A method includes depositing a dielectric cap over a gate structure. A source/drain contact is formed over a source/drain region adjacent to the gate structure. A top of the dielectric cap is oxidized. After oxidizing the top of the dielectric cap, an etch stop layer is deposited over the dielectric cap and an interlayer dielectric (ILD) layer over the etch stop layer. The ILD layer and the etch stop layer are etched to form a via opening extending though the ILD layer and the etch stop layer. A source/drain via is filled in the via opening.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Te-Chih Hsiung, Peng Wang, Jyun-De Wu, Huan-Just Lin
  • Publication number: 20240120900
    Abstract: A suspended resonator including a vibration structure, a first electrode, and a second electrode is provided. The vibration structure includes a vibration region, a frame portion, and a connecting portion. The vibration region includes a plate portion and a thickening portion. The plate portion has a first surface and a second surface opposite to each other. The thickening portion surrounds a central part of the plate portion, and an edge part of the plate portion is sandwiched in the thickening portion. A thickness of the thickening portion is greater than a thickness of the plate portion. The frame portion surrounds the vibration region and maintains a gap with the vibration region. The connecting portion connects the thickening portion with the frame portion. The first electrode is disposed on the first surface. The second electrode is disposed on the second surface.
    Type: Application
    Filed: February 2, 2023
    Publication date: April 11, 2024
    Applicant: TXC Corporation
    Inventors: Shih-Yung Pao, Tzu-Hsiu Peng, Zong-De Lin
  • Publication number: 20240117297
    Abstract: A p-aminobenzoic acid-producing microorganism is provided. The p-aminobenzoic acid-producing microorganism is obtained by a method for preparing a p-aminobenzoic acid-producing microorganism. The method for preparing a p-aminobenzoic acid-producing microorganism includes (a) performing an acclimation process on a source microorganism with at least one sulfonamide antibiotic to obtain at least one acclimatized microorganism and (b) screening out at least one p-aminobenzoic acid-producing microorganism from the at least one acclimatized microorganism, wherein the at least one p-aminobenzoic acid-producing microorganism has a higher p-aminobenzoic acid titer than the source microorganism.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Ching CHANG, Jhong-De LIN, Ya-Lin LIN, Hung-Yu LIAO, Hsiang Yuan CHU, Jie-Len HUANG
  • Patent number: 11949043
    Abstract: A micro light-emitting diode is provided. The micro light-emitting diode includes a first-type semiconductor layer having a first doping type; a light-emitting layer over the first-type semiconductor layer; a first-type electrode over the first-type semiconductor layer; a second-type semiconductor layer having a second doping type over the light-emitting layer, wherein the second doping type is different from the first doping type; a second-type electrode over the second-type semiconductor layer; and a barrier layer under the first-type semiconductor layer and away from the first-type electrode and the second-type electrode, wherein the barrier layer includes a doped region having the second doping type.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: April 2, 2024
    Assignee: PLAYNITRIDE DISPLAY CO., LTD.
    Inventors: Yen-Chun Tseng, Tzu-Yang Lin, Jyun-De Wu, Fei-Hong Chen, Yi-Chun Shih
  • Patent number: 11942371
    Abstract: A method comprises forming a gate dielectric cap over a gate structure; forming source/drain contacts over the semiconductor substrate, with the gate dielectric cap laterally between the source/drain contacts; depositing an etch-resistant layer over the gate dielectric cap; depositing a contact etch stop layer over the etch-resistant layer and an interlayer dielectric (ILD) layer over the contact etch stop layer; performing a first etching process to form a via opening extending through the ILD layer and terminating prior to reaching the etch-resistant layer; performing a second etching process to deepen the via opening such that one of the source/drain contacts is exposed, wherein the second etching process etches the etch-resistant layer at a slower etch rate than etching the contact etch stop layer; and depositing a metal material to fill the deepened via opening.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Peng Wang, Huan-Just Lin
  • Publication number: 20240079608
    Abstract: A voltage pick-up connector for connection to a bipolar plate of a fuel cell. The voltage pick-up connector includes a housing having a housing slot for receiving the bipolar plate. A pair of electrically conductive contact plates are disposed inside the housing and have contact elements for engaging the bipolar plate. An actuator is disposed between the contact plates and is disposed inside the housing. The actuator has a slot for receiving the bipolar plate. The actuator is movable between an extended position, wherein the actuator is disposed between the contact elements so as to separate the contact elements, and a retracted position, wherein the actuator is not disposed between the contact elements.
    Type: Application
    Filed: October 18, 2021
    Publication date: March 7, 2024
    Inventors: Jeng-De Lin, Jeffrey Parrish
  • Publication number: 20240079409
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. A first width direction of the first conductive contact structure is substantially parallel to a second width direction of the first conductive via structure.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyun-De WU, Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Peng WANG, Huan-Just LIN
  • Publication number: 20240072115
    Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
  • Publication number: 20240048122
    Abstract: A resonator including a vibration structure, a first electrode, and a second electrode is provided. The vibration structure includes a vibration region, a protrusion portion, an opening, and a frame portion. The vibration region has a first surface and a second surface opposite to the first surface. The protrusion portion surrounds the vibration region. The opening is disposed at a side of the vibration region and between the vibration region and the protrusion portion. The opening has a first side adjacent to the vibration region and a second side far away from the vibration region. The second side is opposite to the first side. A length of the first side is greater than a length of the second side. The frame portion surrounds the protrusion portion. The first electrode is disposed on the first surface. The second electrode is disposed on the second surface.
    Type: Application
    Filed: November 16, 2022
    Publication date: February 8, 2024
    Applicant: TXC Corporation
    Inventors: Tzu-Hsiu Peng, Wei-Chen Lo, Zong-De Lin
  • Patent number: 11856789
    Abstract: A ferroelectric memory includes a first electrode, a second electrode opposite to the first electrode, a ferroelectric composite layer disposed between the first electrode and the second electrode, and a first insulating layer disposed on one side of the ferroelectric composite layer. The ferroelectric composite layer includes a first electrode layer, a second electrode layer, a ferroelectric layer and an antiferroelectric layer. The first electrode layer is opposite to the second electrode layer, and the ferroelectric layer and the antiferroelectric layer are disposed between the first electrode layer and the second electrode layer.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: December 26, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-De Lin, Po-Chun Yeh, Pei-Jer Tzeng
  • Publication number: 20230203314
    Abstract: A dye for a material with amide functional groups and a dyeing method of using the same are provided. The dye includes a compound represented by Formula (I) and a solvent. Based on the total weight of the dye of 100 wt %, a content of the compound represented by Formula (I) is 40 wt % to 95 wt %. In Chemical Formula (I), R1, R2 and R3 are each independently H, —OH or —COOH, wherein at least one of R1, R2 and R3 is —OH or —COOH.
    Type: Application
    Filed: December 29, 2021
    Publication date: June 29, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Jie-Len Huang, Pei-Ching Chang, Chang-Jung Chang, Jhong-De Lin, Ya-Lin Lin, Hung-Yu Liao, Hsiang-Yuan Chu
  • Patent number: 11658730
    Abstract: A method, device, and computer-readable medium provide for establishing, by a repeater device, a communication channel with a fixed wireless access (FWA) device; receiving, by the repeater device, reference signals from a wireless station; forwarding, by the repeater device, the reference signals to the FWA device; transmitting, by the repeater device, a first uplink signal from the FWA device using a first transmission power level to the wireless station, wherein the first transmission power level is a predetermined value; receiving, in response to the first uplink signal, transmit power control (TPC) command parameters from the FWA device via the communication channel; adjusting, by the repeater device and based on the first TPC command parameters, the first transmission power level from the predetermined value to an adjusted value; and transmitting, at the adjusted transmission power level, a second uplink signal from the FWA device to the wireless station.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: May 23, 2023
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Samirkumar Patel, Andrew E. Youtz, Paul R. Mcdonough, Shen-De Lin
  • Patent number: 11646455
    Abstract: A secondary battery includes a positive electrode sheet which includes a positive-electrode current collector, a positive-electrode active material layer, and a coating layer arranged between the positive-electrode current collector and the positive-electrode active material layer. The coating layer includes a conductive agent and a copolymer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: May 9, 2023
    Assignee: CONTEMPORARY AMPEREX TECHNOLOGY CO., LIMITED
    Inventors: Huang Tang, Ming Zhang, Hao Dong, Qifan Wu, De Lin
  • Publication number: 20230071925
    Abstract: A method for detecting a memory chip includes the following steps coupling a detecting circuit to a first area and a second area of the memory chip, the second area is not overlapped with the first area; inputting a first detecting signal from the detecting circuit to the first area of the memory chip; burning out a cell of the detecting circuit; and inputting a second detecting signal from the detecting circuit to the second area of the memory chip.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 9, 2023
    Inventors: Yan-De LIN, Jui-Hsiu JAO
  • Patent number: 11557360
    Abstract: The present application provides a memory test circuit and a device wafer including the memory test circuit. The memory test circuit is coupled to a memory array having intersecting first and second signal lines, and includes a fuse element and a transistor. The fuse element has a first terminal coupled to a first group of the first signal lines and a test voltage, and has a second terminal coupled to second and third groups of the first signal lines. The transistor has a source/drain terminal coupled to the second terminal of the fuse element and another source/drain terminal coupled to a reference voltage. The first group of the first signal lines are selectively coupled to the test voltage when the transistor is turned on, and all of the first signal lines are coupled to the test voltage when the transistor is kept off.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: January 17, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Yan-De Lin, Jui-Hsiu Jao
  • Publication number: 20220399579
    Abstract: A secondary battery includes a positive electrode sheet which includes a positive-electrode current collector, a positive-electrode active material layer, and a coating layer arranged between the positive-electrode current collector and the positive-electrode active material layer. The coating layer includes a conductive agent and a copolymer.
    Type: Application
    Filed: August 9, 2022
    Publication date: December 15, 2022
    Inventors: Huang TANG, Ming ZHANG, Hao DONG, Qifan WU, De LIN
  • Publication number: 20220359549
    Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a first electrode, a second electrode opposite to the first electrode, a ferroelectric composite layer disposed between the first electrode and the second electrode, and a first insulating layer disposed on one side of the ferroelectric composite layer.
    Type: Application
    Filed: July 6, 2021
    Publication date: November 10, 2022
    Inventors: Yu-De LIN, Po-Chun YEH, Pei-Jer TZENG
  • Publication number: 20220321089
    Abstract: A vibration-absorbing structure for packaging a crystal resonator includes a package base, a resonant crystal blank, and a top cover. The top of the package base has a recess. The sidewall of the package base surrounds the recess. The resonant crystal blank has a border area, at least one serpentine connection area, and a resonant area. The serpentine connection area is connected between the border area and the edge of the resonant area. The border area is arranged on the sidewall. The top cover, arranged on the border area, covers the recess, the at least one serpentine connection area, and the resonant area.
    Type: Application
    Filed: July 13, 2021
    Publication date: October 6, 2022
    Inventors: TZU-HSIU PENG, WEI-CHEN LO, ZONG-DE LIN
  • Patent number: 11432714
    Abstract: A method for manufacture of a tip part for an endoscope including providing a camera assembly, an exterior housing including a circumferential wall enclosing a spacing and a distal end wall integral with the circumferential wall and having an opening; inserting a lens barrel of the camera assembly in the spacing so that a distal end of the lens barrel of the camera assembly extends into the opening, and so that an axially extending adhesive spacing is provided between the opening and the lens barrel along a circumference of the lens barrel, a radial extent of the adhesive spacing gradually being reduced in a direction towards the spacing of the exterior housing; injecting an adhesive into the adhesive spacing; and allowing or causing the adhesive to harden so as to adhere the lens barrel to the distal end wall of the exterior housing.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: September 6, 2022
    Assignee: AMBU A/S
    Inventors: Thomas Bachgaard Jensen, Rung De Lin
  • Patent number: 11345818
    Abstract: A dyeing method includes immersing a fiber into a dye for dyeing the fiber, in which the dye includes indigo and indirubin, and the indigo and the indirubin have a weight ratio of 20:1 to 80:1. The indigo in the dye has a concentration of 0.1% o.w.f. to 5% o.w.f. The dyed fiber may simultaneously have high luminance, high color saturation, high strength of colorization, and sufficient colorfastness.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 31, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Ching Chang, Chang-Jung Chang, Ya-Lin Lin, Yu-Ju Lin, Jhong-De Lin, Hsiang-Yuan Chu, Hung-Yu Liao, Jie-Len Huang