Abstract: A MOSFET active-disable switch is configured to clip an incoming signal in opposing directions when in an off state. By one approach the clipping is symmetrical and accordingly the switch clips both positive and negative peaks of the incoming signal. In many application settings it is useful for the clipping to serve to decrease a predetermined kind of resultant distortion such as even order distortion. In the on state this MOSFET active-disable switch is configured to not clip the incoming signal in opposing directions.

Abstract: A MOSFET active-disable switch is configured to clip an incoming signal in opposing directions when in an off state. By one approach the clipping is symmetrical and accordingly the switch clips both positive and negative peaks of the incoming signal. In many application settings it is useful for the clipping to serve to decrease a predetermined kind of resultant distortion such as even order distortion. In the on state this MOSFET active-disable switch is configured to not clip the incoming signal in opposing directions.

Abstract: These teachings provide for detecting an offset voltage corresponding to a circuit element having an input and an output. (The approaches taught herein will accommodate detecting that offset voltage at either the input and/or the output as desired.) Upon detecting the offset voltage a switch that connects the input of the circuit element to ground automatically closes to thereby ground the input. That switch remains open in the absence of detecting an offset voltage.

Abstract: Circuits for charging capacitors in connection with oscillators are described. The oscillator may include a mechanical resonator. The circuits may include a charging element and a switched capacitor subcircuit to control operation of the charging element, and may be considered a charging circuit in some scenarios. The charging circuits may provide rapid charging of a capacitor to provide a reference voltage to the oscillator.

Abstract: A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair.

Abstract: The disclosed power-on reset circuit provides an indication of when and whether a supply voltage Vdd has reached a trigger voltage level Vtrig. The disclosed circuit includes a flip-flop circuit and a first comparator circuit. The circuit according to the invention has a D input node of the flip-flop circuit coupled to the supply voltage. The first comparator circuit outputs a clock signal, where the flip-flop circuit is clocked by the clock signal. A Q output node of the flip-flop circuit provides the power-on reset signal, where the power-on reset signal is in a LO state when the supply voltage is at a voltage level that is less than the trigger voltage level Vtrig. The power-on reset signal is in a HI state when the supply voltage is at a voltage level that is greater than the trigger voltage level Vtrig.

Abstract: Fractional frequency division is performed by sequentially selecting phase signals for division, where transitioning from a previous phase signal to a next phase signal for division occurs in response to not only the frequency-divided previous phase signal but also a second one of the phase signals. A phase transition that is triggered at least in part in response to a second phase signal having a phase that is greater (with respect to the phase signal sequence) than the phase of the next phase signal can aid minimization of signal glitches. The first frequency-divided signal can be further divided to produce a second frequency-divided signal having a 50-percent duty cycle.

Abstract: A differential current signal circuit is described which includes a voltage to differential current converter circuit that generates a differential pair of current output signals in response to receiving a voltage input signal, where the differential pair of current output signals are linearly proportional to the voltage input signal within a voltage operating range from a minimum operating voltage to a maximum operating voltage. The differential pair of current output signals are linear over a wide range of voltage input signals. A correction circuit is included which eliminates voltage offsets in the voltage operating range due to process and temperature variations. The correction circuit also provides the capability to adjust the minimum operating voltage, and eliminates variations in the minimum operating voltage due to process and temperature variations.

Abstract: A differential current signal circuit is described which includes a voltage to differential current converter circuit that generates a differential pair of current output signals in response to receiving a voltage input signal, where the differential pair of current output signals are linearly proportional to the voltage input signal within a voltage operating range from a minimum operating voltage to a maximum operating voltage. The differential pair of current output signals are linear over a wide range of voltage input signals. A correction circuit is included which eliminates voltage offsets in the voltage operating range due to process and temperature variations. The correction circuit also provides the capability to adjust the minimum operating voltage, and eliminates variations in the minimum operating voltage due to process and temperature variations.

Abstract: The disclosed power-on reset circuit provides an indication of when and whether a supply voltage Vdd has reached a trigger voltage level Vtrig. The disclosed circuit includes a flip-flop circuit and a first comparator circuit. The circuit according to the invention has a D input node of the flip-flop circuit coupled to the supply voltage. The first comparator circuit outputs a clock signal, where the flip-flop circuit is clocked by the clock signal. A Q output node of the flip-flop circuit provides the power-on reset signal, where the power-on reset signal is in a LO state when the supply voltage is at a voltage level that is less than the trigger voltage level Vtrig. The power-on reset signal is in a HI state when the supply voltage is at a voltage level that is greater than the trigger voltage level Vtrig.

Abstract: The disclosed power-on reset circuit provides an indication of when and whether a supply voltage Vdd has reached a trigger voltage level Vtrig. The disclosed circuit includes a flip-flop circuit and a first comparator circuit. The circuit according to the invention has a D input node of the flip-flop circuit coupled to the supply voltage. The first comparator circuit outputs a clock signal, where the flip-flop circuit is clocked by the clock signal. A Q output node of the flip-flop circuit provides the power-on reset signal, where the power-on reset signal is in a LO state when the supply voltage is at a voltage level that is less than the trigger voltage level Vtrig. The power-on reset signal is in a HI state when the supply voltage is at a voltage level that is greater than the trigger voltage level Vtrig.

Abstract: A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair.

Abstract: A differential current signal circuit is described which includes a voltage to differential current converter circuit that generates a differential pair of current output signals in response to receiving a voltage input signal, where the differential pair of current output signals are linearly proportional to the voltage input signal within a voltage operating range from a minimum operating voltage to a maximum operating voltage. The differential pair of current output signals are linear over a wide range of voltage input signals. A correction circuit is included which eliminates voltage offsets in the voltage operating range due to process and temperature variations. The correction circuit also provides the capability to adjust the minimum operating voltage, and eliminates variations in the minimum operating voltage due to process and temperature variations.

Abstract: A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair.

Abstract: Fractional frequency division is performed by sequentially selecting phase signals for division, where transitioning from a previous phase signal to a next phase signal for division occurs in response to not only the frequency-divided previous phase signal but also a second one of the phase signals. A phase transition that is triggered at least in part in response to a second phase signal having a phase that is greater (with respect to the phase signal sequence) than the phase of the next phase signal can aid minimization of signal glitches. The first frequency-divided signal can be further divided to produce a second frequency-divided signal having a 50-percent duty cycle.

Abstract: In a voltage-controlled ring oscillator, one or more controllable current sources generate a bias current in response to a tuning voltage. Any of several features can be included to promote frequency tuning linearity. In accordance with one feature, the ring oscillator circuit transistors can be sized relative to one another to skew the rise and fall times of the ring oscillator output signal with respect to one another. In accordance with another feature, a peak limiter can limit the oscillation amplitude in response to the bias current. In accordance with still another feature, a controllable bias current source can include a voltage-to-current converter and one or more groups of digitally controlled current source transistors.