Abstract: An apparatus for communicating with wireless devices is described. The apparatus in one form includes a shrouded antenna arrangement (700) which is arranged to produce a radiated field forming a pre-determined detection zone having a boundary, spaced apart from the arrangement. Outside of the boundary the energy of the radiated field is below a pre-determined cut-off threshold. The shrouded antenna arrangement (700) in one form comprises an antenna (705) within an RFAM shroud (710). The RFAM shroud (710) may then have an absorption profile that varies around the antenna to form the detection zone.

Abstract: A concurrent asynchronous USB 2.0 data stream destuffer and separator with variable-width bit-wise memory controller is described. A parallel stream bit destuffer module identifies in parallel one or more stuffed bits in a decoded data field of a received data stream using a six-bit sliding window. The stuffed bits are bits that were inserted into the received USB data stream by a transmitter to force data transitions in the received USB data stream. A data separator module separates the one or more stuffed bits from a plurality of valid data bits in the decoded data field. A memory module generates an incremental pointer value representative of the number of valid bits and writes the plurality of valid data bits from the decoded data field into a variable sized bit-wise memory structure.

Abstract: A concurrent asynchronous USB 2.0 data stream destuffer and separator with variable-width bit-wise memory controller is described. A parallel stream bit destuffer module identifies in parallel one or more stuffed bits in a decoded data field of a received data stream using a six-bit sliding window. The stuffed bits are bits that were inserted into the received USB data stream by a transmitter to force data transitions in the received USB data stream. A data separator module separates the one or more stuffed bits from a plurality of valid data bits in the decoded data field. A memory module generates an incremental pointer value representative of the number of valid bits and writes the plurality of valid data bits from the decoded data field into a variable sized bit-wise memory structure.

Abstract: A concurrent asynchronous USB 2.0 data stream destuffer and separator with variable-width bit-wise memory controller is described. A parallel stream bit destuffer module identifies in parallel one or more stuffed bits in a decoded data field of a received data stream using a six-bit sliding window. The stuffed bits are bits that were inserted into the received USB data stream by a transmitter to force data transitions in the received USB data stream. A data separator module separates the one or more stuffed bits from a plurality of valid data bits in the decoded data field. A memory module generates an incremental pointer value representative of the number of valid bits and writes the plurality of valid data bits from the decoded data field into a variable sized bit-wise memory structure.

Abstract: A pipelined Universal Serial Bus (USB) parallel frame delineator and non-return to zero invert (NRZI) decoder is described. Using a three-stage pipeline and parallel data stream processing, a USB transceiver delineates received asynchronous frame boundaries within a USB peripheral NRZI data stream. Using asynchronous parallel data stream processing the USB transceiver concurrently decodes received NRZI encoded data.

Abstract: In order to recover phase information, data transmitted at a first frequency is over-sampled using a clock at a second frequency, n times per bit time to obtain n samples. The n samples are used to detect the transitions between two logic levels in said transmitted data which are stored in groups of m sets of said n edge results which are, in turn output at a clock frequency which is the second frequency divided by m, for further processing.

Abstract: A concurrent asynchronous USB 2.0 data stream destuffer and separator with variable-width bit-wise memory controller is described. A parallel stream bit destuffer module identifies in parallel one or more stuffed bits in a decoded data field of a received data stream using a six-bit sliding window. The stuffed bits are bits that were inserted into the received USB data stream by a transmitter to force data transitions in the received USB data stream. A data separator module separates the one or more stuffed bits from a plurality of valid data bits in the decoded data field. A memory module generates an incremental pointer value representative of the number of valid bits and writes the plurality of valid data bits from the decoded data field into a variable sized bit-wise memory structure.

Abstract: An Ethernet switch using a hash table for address lookup. The hash function is based upon taking a slice of the coefficients of a remainder polynomial obtained after dividing the sum of an address polynomial and a shifted key polynomial by a cyclic redundancy check (CRC) polynomial. The hash table has multiple buckets for each hash table address. The switch may adaptively choose different CRC polynomials for polynomial division or different slices of the remainder polynomials to reduce bucket leakage.

Abstract: Incoming serial data which is received M bits at a time where M=N, N+1 or N−1 and N is greater than 1 is synchronized to a local clock by receiving a first M bits of data, storing the first M bits, receiving M additional bits, storing the M additional bits, repetitively receiving and storing until at least a predetermined number R of bits have been stored, where R=(M*X)+1 where X is an integer greater than one. When this occurs, the first R bits are output and any remaining S bits in excess of R are stored and additional groups of M bits added, with the process continuing until all of a packet has been received. With this arrangement, the R bits may be output at a rate which is a fraction of the serial bit rate.

Abstract: A pipelined Universal Serial Bus (USB) parallel frame delineator and non-return to zero invert (NRZI) decoder is described. Using a three-stage pipeline and parallel data stream processing, a USB transceiver delineates received asynchronous frame boundaries within a USB peripheral NRZI data stream. Using asynchronous parallel data stream processing the USB transceiver concurrently decodes received NRZI encoded data.

Abstract: A concurrent asynchronous USB 2.0 data stream destuffer and separator with variable-width bit-wise memory controller is described. A parallel stream bit destuffer module identifies in parallel one or more stuffed bits in a decoded data field of a received data stream using a six-bit sliding window. The stuffed bits are bits that were inserted into the received USB data stream by a transmitter to force data transitions in the received USB data stream. A data separator module separates the one or more stuffed bits from a plurality of valid data bits in the decoded data field. A memory module generates an incremental pointer value representative of the number of valid bits and writes the plurality of valid data bits from the decoded data field into a variable sized bit-wise memory structure.

Abstract: A system for sensing the coordinate position and an identification of a finger. The sensed position and sensed identification information are substantially simultaneously and continually analyzed. The coordinate position information is used to control a visual cue on a display. The identification information is used to limit access to a computer system.

Abstract: Incoming serial data which is received M bits at a time where M=N, N+1 or N−1 and N is greater than 1 is synchronized to a local clock by receiving a first M bits of data, storing the first M bits, receiving M additional bits, storing the M additional bits, repetitively receiving and storing until at least a predetermined number R of bits have been stored, where R=(M*X)+1 where X is an integer greater than one. When this occurs, the first R bits are output and any remaining S bits in excess of R are stored and additional groups of M bits added, with the process continuing until all of a packet has been received. With this arrangement, the R bits may be output at a rate which is a fraction of the serial bit rate.

Abstract: Over-sampled data is filtered by receiving a word of over-sampled data including sample bits for each of a plurality of data bits, detecting a sample bit having one logic value and, on either side of it, bits having the opposite logic value and, upon such detection, outputting the received word with the sample bit having the one logic value inverted.

Abstract: According to the invention an intelligent network backplane interface is provided for an intelligent local area network hub and a method for implementing the common interface is provided. The hub includes a concentrator backplane operating one or more local area access method. Modules are provided for connection to said backplane for providing a local area network function. A common interface, in the form of a carrier unit having an interface management processor is provided for establishing a connection between any one of various modules and the backplane. The processor provides a control for exchanging information between a module and the common interface with a first mailbox for reading information signals from the module and writing information signals to the interface and a second mailbox for reading information from the interface and writing information to the module. Information acquired by the control is used to form a parameter table for listing features of the module.