Abstract: A pressure plug is disclosed and includes a circular and threaded plate, a flexible sealing collar, a pressure plate, and a T handle. The circular threaded pate receives the bottom edge of the flexible sealing collar in a stepped upward surface, and the pressure plate is placed on top of the sealing collar. The threaded plate has a shaft extended upward from its center and towards a hole in the top pressure plate having an angled surface on its outer bottom face. The T handle is threaded onto the threaded shaft, and as the T handle is tightened the two plates are pulled toward each other. This forces the upper edge of the sealing collar outwardly against the inside diameter of the pipe, thereby creating a seal. By sealing both ends of the pipe, then the heated pipe can be re-shaped, while the contained pressure prevents collapsing or kinking of the pipe.

Abstract: A microprocessor simulation method, system, and program product built upon the underlying hardware design of the microprocessor. The method, system, and program product stops normal functions of a simulation testcase, starts the scan clocks, records a first “snap shot” of the scan ring data at this initial time. The hardware logic then rotates (shifts) the scan ring using the current scan data, and when the scan clock stops (where the stop of the scan clock is controlled based on the number of latches on the scan ring), another “snap shot” of scan ring data is taken. The “snap shots” are compared and if both of the “snap shots” are identical the functional scan is successful. But if the functional scan verification fails to rotate the scan chain correctly, that is, if some of the latches do not match in the two “snap shots,” it becomes necessary to locate the broken spot within the large number of scan latches.

Abstract: Method and program product for analyzing an asynchronously clocked system. The system being analyzed has independently clocked subsystems with clock boundaries therebetween. The model identifies a boundary between the two independently clocked subsystems, and identifies behavior at the boundary between the two independently clocked subsystems. and modeling a latch at the boundary between the two independently clocked subsystems with a behavior model, said behavioral model comprising data receiver time delays.

Abstract: The generation and selection of addresses to be employed in a verification environment are tightly coupled to ensure that the addresses a user desires to be selected have been generated. Addresses are generated based on one or more defined selection attributes. The generated addresses are maintained in a database structure that also includes any attributes associated with the addresses. At least one address is selected from the database structure via a filter and forwarded to a component under test.