Patents by Inventor Dean E. Gonzales

Dean E. Gonzales has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230308132
    Abstract: Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. In order to better handle noise issues when using single-ended signaling, one or more of the receivers include equalization circuitry and termination circuitry. The termination circuitry prevents reflection on a corresponding transmission line ending at a corresponding receiver. The equalization circuitry uses a bridged T-coil circuit to provide continuous time linear equalization (CTLE) with no feedback loop. The equalization circuitry performs equalization by providing a high-pass filter that offsets the low-pass characteristics of a corresponding transmission line. A comparator of the receiver receives the input signal and compares it to a reference voltage.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Inventors: Dean E. Gonzales, Edoardo Prete, Milam Paraschou, Mark Chirachanchai, Gerald R. Talbot
  • Patent number: 11487605
    Abstract: Techniques are provided herein for pre-emptively reinforcing one or more buses of a computing device against the effects of signal noise that could cause a reduction in signal integrity. The techniques generally include detecting an event (or “trigger”) that would tend to indicate that a reduction in signal integrity will occur, examining a reinforcement action policy and system status to determine what reinforcement action to take, and performing the reinforcement action.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: November 1, 2022
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David A. Roberts, Dean E. Gonzales
  • Patent number: 10749552
    Abstract: Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A termination voltage is generated and sent to the multiple receivers. The termination voltage is coupled to each of signal termination circuitry and signal sampling circuitry within each of the multiple receivers. Any change in the termination voltage affects the termination circuitry and affects comparisons performed by the sampling circuitry. Received signals are reconstructed at the receivers using the received signals, the signal termination circuitry and the signal sampling circuitry.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: August 18, 2020
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Balwinder Singh, Milam Paraschou, Chad S. Gallun, Jeffrey Cooper, Dean E. Gonzales, Alushulla Jack Ambundo, Thomas H. Likens, III, Gerald R. Talbot
  • Publication number: 20200099406
    Abstract: Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A termination voltage is generated and sent to the multiple receivers. The termination voltage is coupled to each of signal termination circuitry and signal sampling circuitry within each of the multiple receivers. Any change in the termination voltage affects the termination circuitry and affects comparisons performed by the sampling circuitry. Received signals are reconstructed at the receivers using the received signals, the signal termination circuitry and the signal sampling circuitry.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 26, 2020
    Inventors: Balwinder Singh, Milam Paraschou, Chad S. Gallun, Jeffrey Cooper, Dean E. Gonzales, Alushulla Jack Ambundo, Thomas H. Likens, III, Gerald R. Talbot
  • Patent number: 10530325
    Abstract: Systems, apparatuses, and methods for performing efficient data transfer in a computing system are disclosed. A computing system includes multiple transmitters sending singled-ended data signals to multiple receivers. A receiver includes multiple series inductors moved from a signal path to sampling circuitry to a termination path used for impedance matching. The removed direct current (DC) resistances of the inductors in the signal path reduces signal attenuation. The termination path has alternating current (AC) reactances of the inductors, which provide a frequency-dependent termination impedance. This termination impedance provides a positive reflection coefficient for high operating frequencies, which boosts the input signal being received by the sampling circuitry.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: January 7, 2020
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Dean E. Gonzales, Xuan Chen, Jeffrey Cooper, Milam Paraschou
  • Publication number: 20190286513
    Abstract: Techniques are provided herein for pre-emptively reinforcing one or more buses of a computing device against the effects of signal noise that could cause a reduction in signal integrity. The techniques generally include detecting an event (or “trigger”) that would tend to indicate that a reduction in signal integrity will occur, examining a reinforcement action policy and system status to determine what reinforcement action to take, and performing the reinforcement action.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 19, 2019
    Applicant: Advanced Micro Devices, Inc.
    Inventors: David A. Roberts, Dean E. Gonzales
  • Patent number: 10122392
    Abstract: Systems, apparatuses, and methods for implementing a negative resistance circuit for bandwidth extension are disclosed. Within a feedback path of a differential signal path, capacitors are placed on the inputs and outputs of a fully differential amplifier connecting to the differential signal path. In one embodiment, a circuit includes a fully differential amplifier and four capacitors. A first capacitor is coupled between a first signal path and a non-inverting input terminal of the amplifier and a second capacitor is coupled between the first signal path and a non-inverting output terminal of the amplifier. A third capacitor is coupled between a second signal path and an inverting input terminal of the amplifier and a fourth capacitor is coupled between the second signal path and an inverting output terminal of the amplifier. The first and second signal paths carry a differential signal.
    Type: Grant
    Filed: August 18, 2016
    Date of Patent: November 6, 2018
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Milam Paraschou, Gerald R. Talbot, Dean E. Gonzales
  • Publication number: 20180054223
    Abstract: Systems, apparatuses, and methods for implementing a negative resistance circuit for bandwidth extension are disclosed. Within a feedback path of a differential signal path, capacitors are placed on the inputs and outputs of a fully differential amplifier connecting to the differential signal path. In one embodiment, a circuit includes a fully differential amplifier and four capacitors. A first capacitor is coupled between a first signal path and a non-inverting input terminal of the amplifier and a second capacitor is coupled between the first signal path and a non-inverting output terminal of the amplifier. A third capacitor is coupled between a second signal path and an inverting input terminal of the amplifier and a fourth capacitor is coupled between the second signal path and an inverting output terminal of the amplifier. The first and second signal paths carry a differential signal.
    Type: Application
    Filed: August 18, 2016
    Publication date: February 22, 2018
    Inventors: Milam Paraschou, Gerald R. Talbot, Dean E. Gonzales
  • Patent number: 6280298
    Abstract: The present invention relates to apparatus and methods for cleaning debris from a test probe. Debris is cleaned from the test probe by oxidizing the test probe debris in an oxidizing agent and dissolving said oxidized debris in a cleaning agent. Preferably, a membrane, such as a liquid polymer, is disposed over the oxidizing agent and/or the cleaning agent to prevents any off-gassing of either agent, prevent reaction of either agent with ambient atmosphere or each other, and/or prevent either agent being spilled and/or having personnel exposed to either agent.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: August 28, 2001
    Assignee: Intel Corporation
    Inventor: Dean E. Gonzales