Patents by Inventor Dean E. Lin

Dean E. Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080092779
    Abstract: An ultraviolet absorber formulation and a method of preparing the same. The ultraviolet absorber formulation comprises a zinc oxide powder and a transparent coating on surfaces of the zinc oxide powder, thus forming a core-shell structure. The ultraviolet absorber is prepared by wet chemical surface modification. A zinc oxide powder is dispersed by media or non-media milling to provide a slurry of zinc oxide. The zinc oxide slurry is subjected to a coating process to deposit a transparent coating, thus giving the ultraviolet absorber.
    Type: Application
    Filed: March 16, 2007
    Publication date: April 24, 2008
    Inventors: Hui Tung Wang, Ching-Chih Lai, Dean E Lin
  • Patent number: 6238983
    Abstract: A metal code process for a read-only memory (ROM) combines the alignment dip back process (to reduce the polyoxide thickness over the gate electrode and to protect the field oxide) with a double charge implant approach to provide the function of a depletion mode ROM cell. The alignment dip back process also avoids leakage current problems. A stable depletion mode device character is achieved by implant step energies greater than 150 keV.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: May 29, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Cheng-Yu Chu, Jenq-Dong Sheu, Dean E. Lin, Yi-Jing Chu
  • Patent number: 6143579
    Abstract: It has been observed that, when a commercial plasma etcher is used for multiple etching tasks involving a variety of products, the amount of plasma damage incurred depends upon the chamber history of the etching tool. Thus, etching a gate sidewall spacer on a damage sensitive product, for example, in a MOSFET product with very thin gate oxide, may result in significant degradation of the gate oxide if the plasma etching tool had been used to etch vias on another type product in the preceding job. A method for monitoring and recording the chamber history and ascertaining the status of a plasma etching tool with regard to the tendency of said tool to introduce plasma damage in thin gate and tunnel oxide layers is disclosed. The method includes an a oxide damage monitor wafer which contains arrays of simple test devices. The monitor wafers can be partially formed and banked for later use. The test devices comprise a polysilicon plate partially covering a gate oxide.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: November 7, 2000
    Assignee: Taiwan Semiconductor Manufacturing Ltd.
    Inventors: Chia-Der Chang, Chi-Hung Liao, Dean-E Lin, Sheng-Liang Pan
  • Patent number: 5580112
    Abstract: The invention provides a vacuum pencil having an abutment pin which limits the distance the tip of the vacuum pencil can extend past the edge of a wafer thus reducing scratches on the device sides of adjacent wafers. The vacuum pencil has a relatively flat tip connected to a body. The tip has a flat top side for engaging a wafer. The top side of the tip has channels for delivering a vacuum to seal against the wafer against the tip. The top side of the tip also has an pin mounted between the channels and the body. A passage for delivering a vacuum runs through the body and the channel is connected to the channel in the tip. The pin can be a pentagon shaped pin which is about 1 mm high.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: December 3, 1996
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Dean E. Lin, Chien K. Chou, Chih M. Chen