Patents by Inventor Dean Fernando
Dean Fernando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10438876Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a driver integrated circuit (IC) situated on a leadframe. The PQFN package further includes low-side U-phase, low-side V-phase, and low-side W-phase power switches situated on the leadframe. A logic ground of the leadframe is coupled to a support logic circuit of the driver IC. A power stage ground of the leadframe is coupled to sources of the low-side U-phase, low-side V-phase, and low-side W-phase power switches. The power stage ground can further be coupled to gate drivers of the driver IC.Type: GrantFiled: April 25, 2017Date of Patent: October 8, 2019Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9899302Abstract: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.Type: GrantFiled: May 17, 2017Date of Patent: February 20, 2018Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Publication number: 20170250127Abstract: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.Type: ApplicationFiled: May 17, 2017Publication date: August 31, 2017Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Publication number: 20170229383Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a driver integrated circuit (IC) situated on a leadframe. The PQFN package further includes low-side U-phase, low-side V-phase, and low-side W-phase power switches situated on the leadframe. A logic ground of the leadframe is coupled to a support logic circuit of the driver IC. A power stage ground of the leadframe is coupled to sources of the low-side U-phase, low-side V-phase, and low-side W-phase power switches. The power stage ground can further be coupled to gate drivers of the driver IC.Type: ApplicationFiled: April 25, 2017Publication date: August 10, 2017Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9711437Abstract: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes a temperature sensor situated on the leadframe, where the temperature sensor is configured to generate a sensed temperature of the power switches. The semiconductor package also includes a driver circuit configured to drive the power switches of the multi-phase power inverter responsive to the sensed temperature. The temperature sensor can be on a common IC with the driver circuit. Furthermore, the semiconductor package can include an over-temperature protection circuit configured to provide over-temperature protection to the multi-phase power inverter using the sensed temperature.Type: GrantFiled: January 10, 2014Date of Patent: July 18, 2017Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9659845Abstract: A power quad flat no-lead (PQFN) package includes a driver integrated circuit (IC) situated on a leadframe. The PQFN package further includes low-side U-phase, low-side V-phase, and low-side W-phase power switches situated on the leadframe. A logic ground of the leadframe is coupled to a support logic circuit of the driver IC. A power stage ground of the leadframe is coupled to sources of the low-side U-phase, low-side V-phase, and low-side W-phase power switches. The power stage ground can further be coupled to gate drivers of the driver IC.Type: GrantFiled: December 10, 2013Date of Patent: May 23, 2017Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9620954Abstract: According to an exemplary implementation, a semiconductor package includes a multi-phase power inverter having power switches and situated on a leadframe of the semiconductor package. The semiconductor package further includes an over-temperature protection circuit configured to reduce current through the power switches based on multiple temperature threshold values of the power switches and a sensed temperature of the power switches. The over-temperature protection circuit can be configured to enter first and second modes based on the multiple temperature threshold values and the sensed temperature, where the second mode reduces current through the power switches to a greater extent than the first mode.Type: GrantFiled: January 10, 2014Date of Patent: April 11, 2017Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9530724Abstract: Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power devices coupled to the leadframe, and a plurality of wirebonds providing electrical interconnects, including at least one wirebond from a top surface electrode of one of the plurality of vertical conduction power devices to a portion of the leadframe, wherein the portion of the leadframe is electrically connected to a bottom surface electrode of another of the plurality of vertical conduction power devices. In this manner, efficient multi-chip circuit interconnections can be provided in a PQFN package using low cost lead frames.Type: GrantFiled: April 30, 2015Date of Patent: December 27, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa
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Patent number: 9524928Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a multi-phase power inverter, a control circuit, and a driver circuit. The driver circuit is configured to drive the multi-phase power inverter responsive to a control signal from the control circuit. The multi-phase power inverter, the control circuit, and the driver circuit are each situated on a PQFN leadframe of the PQFN package. The control circuit and the driver circuit can be in a common integrated circuit (IC). Furthermore, the control circuit can be configured to reconstruct at least two phase currents of the multi-phase power inverter from a combined phase current.Type: GrantFiled: January 3, 2014Date of Patent: December 20, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9449957Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) leadframe includes U-phase and W-phase power switches situated on the PQFN leadframe and respectively connected to a U-phase output strip and a W-phase output pad of the PQFN leadframe. The PQFN leadframe further includes a common integrated circuit (IC) including a driver circuit and a control circuit where the common IC is connected to the U-phase output strip and to the W-phase output pad of the PQFN leadframe. The PQFN leadframe can also include a V-phase power switch situated on the PQFN leadframe where the V-phase power switch is connected to a V-phase output strip of the PQFN leadframe.Type: GrantFiled: January 8, 2014Date of Patent: September 20, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9443795Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a multi-phase inverter situated on a leadframe. The PQFN package further includes drivers situated on the leadframe and configured to drive the multi-phase inverter. The PQFN package also includes bootstrap diodes respectively coupled to the drivers. The bootstrap diodes are in a common integrated circuit (IC) that is situated on the leadframe. The common IC can include the drivers. The drivers can be high side drivers that are coupled to high side power switches of the multi-phase inverter. Also, the bootstrap diodes can be coupled to a supply voltage terminal of the PQFN package. Furthermore, the PQFN package can include wirebonds coupling the common IC to bootstrap supply voltage terminals of the PQFN package.Type: GrantFiled: December 24, 2013Date of Patent: September 13, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9362215Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) package includes a U-phase output node situated on a first leadframe island of a leadframe, a V-phase output node situated on a second leadframe island of said leadframe, and a W-phase output node situated on a W-phase die pad of said leadframe. The first leadframe island can be on a first leadframe strip of the leadframe, where the first leadframe strip is connected to a U-phase die pad of the leadframe. The second leadframe island can be on a second leadframe strip of the leadframe, where the second leadframe strip is connected to a V-phase die pad of the leadframe. A first W-phase power switch is situated on the W-phase die pad. Furthermore, at least one wirebond is connected to the W-phase die pad and to a source of a second W-phase power switch. The W-phase die pad can be a W-phase output terminal of the PQFN package.Type: GrantFiled: December 10, 2013Date of Patent: June 7, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa
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Patent number: 9355995Abstract: According to an exemplary implementation, a method includes utilizing a leadframe panel comprising a plurality of leadframe modules, each of the plurality of leadframe modules having a leadframe pad. The leadframe panel has a plurality of bars each having a plurality of grooves, where the plurality of bars connect the plurality of leadframe modules. The method further includes attaching a device to the leadframe pad. The method also includes molding the leadframe panel while leaving a bottom of the leadframe pad exposed. Furthermore, the method includes sawing through the plurality of grooves of the plurality of bars to singulate the plurality of leadframe modules into separate packaged modules.Type: GrantFiled: January 10, 2014Date of Patent: May 31, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa
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Patent number: 9324646Abstract: According to an exemplary implementation, a power quad flat no-lead (PQFN) leadframe includes U-phase, V-phase, and W-phase power switches situated on the PQFN leadframe. A drain of the U-phase power switch is connected to a U-phase output strip of the PQFN leadframe. A source of the U-phase power switch is connected to a U-phase current sense terminal. The U-phase output strip can substantially traverse across the PQFN leadframe. Another U-phase power switch is situated on the PQFN leadframe with a source of the another U-phase power switch connected to the U-phase output strip of the PQFN leadframe. The PQFN leadframe can include a leadframe island within the U-phase output strip. At least one wirebond may be connected to the U-phase output strip.Type: GrantFiled: December 10, 2013Date of Patent: April 26, 2016Assignee: Infineon Technologies America Corp.Inventors: Dean Fernando, Roel Barbosa, Toshio Takahashi
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Patent number: 9324638Abstract: Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power devices coupled to the leadframe, and a plurality of wirebonds providing electrical interconnects, including at least one wirebond from a top surface electrode of one of the plurality of vertical conduction power devices to a portion of the leadframe, wherein the portion of the leadframe is electrically connected to a bottom surface electrode of another of the plurality of vertical conduction power devices. In this manner, efficient multi-chip circuit interconnections can be provided in a PQFN package using low cost leadframes.Type: GrantFiled: October 26, 2012Date of Patent: April 26, 2016Assignee: Infineon Technologies Americas Corp.Inventors: Dean Fernando, Roel Barbosa
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Publication number: 20160105984Abstract: In one implementation, a power unit for plugging into a mother board includes a power module situated on a substrate. The substrate is situated on conductive slats, each having an extended end away from the power module. Each of the conductive slats provides a mounting contact of the power unit. Each mounting contact is electrically coupled to the power module by electrical routing in the substrate. The mounting contacts are configured to provide electrical connection between the power module and the mother board.Type: ApplicationFiled: September 17, 2015Publication date: April 14, 2016Inventors: Eung San Cho, Thomas J. Ribarich, Dean Fernando, Kevin Moody, Dae Keun Park, Chuan Cheah
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Publication number: 20160105983Abstract: In one implementation, an insertable power unit for plugging into a mother board includes a power module situated on a substrate, and a mounting contact on an extended side of the substrate away from the power module. The mounting contact is electrically coupled to the power module by electrical routing in the substrate. The mounting contact is configured to provide electrical connection between the power module and the mother board.Type: ApplicationFiled: September 17, 2015Publication date: April 14, 2016Inventors: Eung San Cho, Thomas J. Ribarich, Dean Fernando, Kevin Moody, Dae Keun Park, Chuan Cheah
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Publication number: 20150235932Abstract: Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power devices coupled to the leadframe, and a plurality of wirebonds providing electrical interconnects, including at least one wirebond from a top surface electrode of one of the plurality of vertical conduction power devices to a portion of the leadframe, wherein the portion of the leadframe is electrically connected to a bottom surface electrode of another of the plurality of vertical conduction power devices. In this manner, efficient multi-chip circuit interconnections can be provided in a PQFN package using low cost lead frames.Type: ApplicationFiled: April 30, 2015Publication date: August 20, 2015Inventors: Dean Fernando, Roel Barbosa
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Patent number: 9041175Abstract: According to an exemplary embodiment, a monolithic power converter package includes a monolithic die over a substrate, the monolithic die integrating a driver integrated circuit (IC) with a control power transistor and a sync power transistor connected in a half-bridge. A high side power input, a low side power input, and a power output of the half-bridge are each disposed on a top surface of the monolithic die. The high side power input is electrically and mechanically coupled to the substrate by a high side power strip. Also, the low side power input is electrically and mechanically coupled to the substrate by a low side power strip. Furthermore, the power output is electrically and mechanically coupled to the substrate by a power output strip.Type: GrantFiled: October 19, 2012Date of Patent: May 26, 2015Assignee: International Rectifier CorporationInventors: Eung San Cho, Dean Fernando, Tim Philips, Dan Clavette
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Patent number: 9024420Abstract: Some exemplary embodiments of a multi-chip module (MCM) power quad flat no-lead (PQFN) semiconductor package utilizing a leadframe for electrical interconnections have been disclosed. One exemplary embodiment comprises a PQFN semiconductor package comprising a leadframe, a driver integrated circuit (IC) coupled to the leadframe, a plurality of vertical conduction power devices coupled to the leadframe, and a plurality of wirebonds providing electrical interconnects, including at least one wirebond from a top surface electrode of one of the plurality of vertical conduction power devices to a portion of the leadframe, wherein the portion of the leadframe is electrically connected to a bottom surface electrode of another of the plurality of vertical conduction power devices. In this manner, efficient multi-chip circuit interconnections can be provided in a PQFN package using low cost leadframes.Type: GrantFiled: November 11, 2013Date of Patent: May 5, 2015Assignee: International Rectifier CorporationInventors: Dean Fernando, Roel Barbosa