Abstract: An apparatus including a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to a modulated signal and a seed value selected in response to a first control signal. The second circuit may be configured to generate a second control signal in response to the demodulated signal. The third circuit may be configured to generate the first control signal in response to the second control signal, a compensation signal, and the first control signal, where generation of the first control signal includes adding the second control signal, the compensation signal, and a latched version of the first control signal. Generation of the latched version of the first control signal may include sampling the first control signal in response to a clock signal. The compensation signal may compensate for variation in the clock signal.

Abstract: An apparatus generally comprising a first circuit, a second circuit and a third circuit is shown. The first circuit may be configured to generate a phase signal by dividing each cycle of an output clock into a plurality of phase values. The second circuit may be configured to generate an intermediate data signal by interpolating an input data signal sampled with an input clock in response to the phase signal and the output clock. The third circuit configured to generate an output data signal by sampling the intermediate data signal with the output clock.

Abstract: An apparatus including a first circuit, a second circuit, a third circuit and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to (i) a modulated signal and (ii) a seed value. The said seed value may be selected in response to a first control signal. The second circuit may be configured to generate a second control signal in response to the demodulated signal. The third circuit may be configured to generate the first control signal in response to (i) the second control signal, (ii) a compensation signal, and (iii) the first control signal, where (a) generation of the first control signal may include adding the second control signal, the compensation signal, and a latched version of the first control signal, (b) generation of the latched version of the first control signal may include sampling the first control signal in response to a clock signal, and (c) the compensation signal may compensate for variation in the clock signal.

Abstract: An apparatus comprising a first circuit, a second circuit, a third circuit and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to (i) a modulated signal and (ii) a seed value. The second circuit may be configured to generate a first control signal in response to the demodulated signal. The third circuit may be configured to generate a second control signal in response to (i) the first control signal and (ii) a compensation signal. The fourth circuit may be configured to generate the seed value in response to the second control signal.

Abstract: An apparatus comprising a first circuit, a second circuit, a third circuit and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to (i) a modulated signal and (ii) a seed value. The second circuit may be configured to generate a first control signal in response to the demodulated signal. The third circuit may be configured to generate a second control signal in response to (i) the first control signal and (ii) a compensation signal. The fourth circuit may be configured to generate the seed value in response to the second control signal.

Abstract: An apparatus generally comprising a tuner circuit, an analog-to-digital circuit and a converter circuit. The tuner circuit may be configured to generate an intermediate frequency signal having a carrier signal at a first intermediate frequency in response to a first frequency conversion applied to a radio-frequency signal modulated by an analog television signal. The analog-to-digital circuit may be configured to generate a digital intermediate signal having the carrier signal at a second intermediate frequency in response to a digitization of the intermediate frequency signal. The converter circuit may be configured to generate a digital television signal representative of the analog television signal at a baseband frequency in response to a demodulation of the digital intermediate signal.

Abstract: An apparatus generally comprising a first circuit, a second circuit and a third circuit is shown. The first circuit may be configured to generate a phase signal by dividing each cycle of an output clock into a plurality of phase values. The second circuit may be configured to generate an intermediate data signal by interpolating an input data signal sampled with an input clock in response to the phase signal and the output clock. The third circuit configured to generate an output data signal by sampling the intermediate data signal with the output clock.

Abstract: An apparatus comprising a first circuit, a second circuit, a third circuit and a fourth circuit. The first circuit may be configured to generate a demodulated signal in response to (i) a modulated signal and (ii) a seed value. The second circuit may be configured to generate a first control signal in response to the demodulated signal. The third circuit may be configured to generate a second control signal in response to (i) the first control signal and (ii) a compensation signal. The fourth circuit may be configured to generate the seed value in response to the second control signal.

Abstract: A system for providing spectral compensation for vestigial sideband, VSB, signals with carrier frequency error. The VSB signal is sampled and digitized. The carrier frequency of the digitized signal is translated to a selected IF frequency. A fixed frequency VSB filter is then used to provide spectral compensation for the signal.

Abstract: The 25 Hz offset present in the subcarrier frequency of the PAL television standard causes residual and phase modified subcarrier to be left on the luminance signal, which can produce undesirable visual artifacts in the picture. In order to filter luminance therefore without loss of resolution, an adaptive luminance filtering process and structure are provided. Due to the wide range of sample frequencies that must be dealt with, there are e.g. three separate filters available selectable under software control depending on the particular video standard being filtered, i.e. for various of the of NTSC and PAL television standards. The adaptive notch filter is switched on during times of low video transitions and is by-passed during high video transitions, thus avoiding loss of resolution during the high video transitions.

Abstract: A video comb filter for PAL or NTSC TV standards separates luminance and chrominance signals from a composite video signal by adaptively selecting between at least two different filtering processes, depending on whether the chroma output of the processes is "legal" (is within certain limits) in terms of both magnitude and phase. The present comb filter has a two horizontal scan line delay, and is such that the magnitude and phase of a chrominance signal output from the filter never exceeds that of a single band pass filtered version of the composite video and subsequently does not invert the phase of the luminance signal. The chrominance output signal characteristic is similar to that a four scan line filter; however, because the present filter only uses two lines of delay, any vertical cross luminance occurs across only two scan lines and the diagonal luminance resolution is significantly improved. The output of the comb filter is "legal" (within the RGB color cube) at all times.

Abstract: A decoder that provides simultaneous horizontal scanning lines for digital color video, and then band splits each line into high and low frequency signals using low pass filters and subtractors to subtract the low frequency signals from the source video. The high and low frequency signals and the source video for each line is fed to a three tap comb filter, and the high and low frequency signal inputs to the comb filter are also fed to a vertical transition detector that demodulates the high frequency signals, and then provides differences between pairs of lines for luma, chroma magnitude, and chroma phase. The difference signals are used to provide a control signal that automatically switches the comb filter from a three line weighted comb to a two line comb when large vertical transitions are detected in luma, chroma magnitude, or chroma phase.

Abstract: A decoder that provides simultaneous horizontal scanning lines for digital color video, and then band splits each line into high and low frequency signals using low pass filters and subtractors to subtract the low frequency signals from the source video. The high and low frequency signals and the source video for each line is fed to a three tap comb filter, and the high and low frequency signal inputs to the comb filter are also fed to a vertical transition detector that demodulates the high frequency signals, and then provides differences between pairs of lines for luma, chroma magnitude, and chroma phase. The difference signals are used to provide a control signal that automatically switches the comb filter from a three line weighted comb to a two line comb when large vertical transitions are detected in luma, chroma magnitude, or chroma phase.