Abstract: Systems, devices and methods are disclosed for suppressing the 2LO frequency spur, output from a mixer. In various exemplary embodiments, a DC bias circuit is electrically connected to provide DC bias to one or more non-linear elements of the mixer. The biasing voltage is used to cause the current-voltage characteristics and/or junction capacitances between non-linear elements to be more symmetric and/or to suppress 2LO leakage currents that form 2LO frequency spurs at the output of the mixer. The non-linear elements may comprise one of: BJT's, diodes, and FET's. The mixer may be one of: a subharmonic mixer; a fundamental resistive mixer; a fundamental subharmonic transconductance mixer; and a fundamental transconductance mixer comprising an anti-parallel diode pair. The system may further be configured to automatically determine an appropriate DC bias voltage level that will improve one of the LO-IF isolation and the LO-RF isolation.

Abstract: Systems, devices and methods are disclosed for suppressing the 2LO frequency spur, output from a mixer. In various exemplary embodiments, a DC bias circuit is electrically connected to provide DC bias to one or more non-linear elements of the mixer. The biasing voltage is used to cause the current-voltage characteristics and/or junction capacitances between non-linear elements to be more symmetric and/or to suppress 2LO leakage currents that form 2LO frequency spurs at the output of the mixer. The non-linear elements may comprise one of: BJT's, diodes, and FET's. The mixer may be one of: a subharmonic mixer; a fundamental resistive mixer; a fundamental subharmonic transconductance mixer; and a fundamental transconductance mixer comprising an anti-parallel diode pair. The system may further be configured to automatically determine an appropriate DC bias voltage level that will improve one of the LO-IF isolation and the LO-RF isolation.