Patents by Inventor Dean Wang
Dean Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11964989Abstract: Compounds that inhibit KRas G12D. In particular, compounds that inhibit the activity of KRas G12D, pharmaceutical compositions comprising the compounds and methods of use therefor, and in particular, methods of treating cancer. The compounds have a general structure represented by Formula (I): or a pharmaceutically acceptable salt thereof.Type: GrantFiled: July 20, 2022Date of Patent: April 23, 2024Assignees: Mirati Therapeutics, Inc., Array BioPharma Inc.Inventors: Xiaolun Wang, Aaron Craig Burns, James Gail Christensen, John Michael Ketcham, John David Lawson, Matthew Arnold Marx, Christopher Ronald Smith, Shelley Allen, James F. Blake, Mark Joseph Chicarelli, Joshua Ryan Dahlke, Donghua Dai, Jay Bradford Fell, John Peter Fischer, Macedonio J. Mejia, Brad Newhouse, Phong Nguyen, Jacob Matthew O'Leary, Spencer Pajk, Martha E. Rodriguez, Pavel Savechenkov, Tony P. Tang, Guy P.A. Vigers, Qian Zhao, Dean Russell Kahn, John Gaudino, Michael Christopher Hilton
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Patent number: 11967818Abstract: Described are systems and methods for monitoring, detecting, and/or protecting various systems of an aerial vehicle, such as an unmanned aerial vehicle (UAV). Embodiments of the present disclosure can provide a multi-tiered system to provide monitoring, detection, and/or initiation of protection protocols in response to detected faults in connection with the electronics associated with UAV systems, such as the motor drive and/or control systems that may drive the propulsion systems of the UAV.Type: GrantFiled: March 30, 2022Date of Patent: April 23, 2024Assignee: Amazon Technologies, Inc.Inventors: Lizon Maharjan, Frederic Pierre Lacaux, Dean Joseph Brestel, Xiaoqi Wang, Andrew Lueneburg, Marc Ian Feifel
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Patent number: 11950163Abstract: Systems and methods include the following. Information about a first electronic communication device is transmitted to at least one server and/or decentralized infrastructure. The information includes vicinity information. A status signal associated with a first user of the first electronic communication device is optionally transmitted. Contact proximity network information about a contact proximity network is received. The contact proximity network is based on the information from a plurality of electronic communication devices and information about the association between users and electronic communication devices. The contact proximity network information includes status signal information and interconnected nodes corresponding to different users and pairwise connections between users based upon their relative physical space and time proximity.Type: GrantFiled: June 4, 2021Date of Patent: April 2, 2024Assignee: Expii Inc.Inventors: Po-Shen Loh, Hannah Cai, Felipe Campos, John Choi, Timothy Chu, Dean Dijour, Bennett Huffman, Mohammed Jaffer, Ziv Scully, Brandon Wang, Lawrence Wang, Phillip Wang
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Publication number: 20240089698Abstract: Systems and methods include the following. Information about a first electronic communication device is transmitted to at least one server and/or decentralized infrastructure. The information includes vicinity information. A status signal associated with a first user of the first electronic communication device is optionally transmitted. Contact proximity network information about a contact proximity network is received. The contact proximity network is based on the information from a plurality of electronic communication devices and information about the association between users and electronic communication devices. The contact proximity network information includes status signal information and interconnected nodes corresponding to different users and pairwise connections between users based upon their relative physical space and time proximity.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Inventors: Po-Shen Loh, Hannah Cai, Felipe Campos, John Choi, Timothy Chu, Dean Dijour, Bennett Huffman, Mohammed Jaffer, Ziv Scully, Brandon Wang, Lawrence Wang, Phillip Wang
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Publication number: 20240042953Abstract: Particular embodiments described herein provide for a system and method to help prevent condensation inside an enclosure that includes an electronic system. The system and method can determine a current relative humidity of an environment inside an enclosure that houses the electronic system, use the current relative humidity and the current maximum temperature to determine a dew point for the environment inside the enclosure, activate one or more heating elements inside the enclosure when the current minimum temperature is the same or lower than the dew point for the environment inside the enclosure, activate one or more embedded fans, and open one or more vents to help purge moisture out of the system during heating. When the current minimum temperature is higher than the dew point for the environment inside the enclosure, the system and method can allow the electronic system to power on.Type: ApplicationFiled: August 4, 2022Publication date: February 8, 2024Applicant: GM Cruise Holdings LLCInventors: Fen Chen, Gilberto Madrid Gomez, Tyler Sawyer, Dean Wang, Arul Ramalingam, Timothy Seto
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Publication number: 20230388610Abstract: The present invention relates to an image sensing device comprising: an image sensing array and an image processing circuit. The image sensing array includes sub-array regions used to obtain sensing signals having different exposure period, wherein in a main frame period, the sensing signals include static sensing signals and dynamic sensing signals, the number of the static sensing signals and the dynamic sensing signals are any different positive integers, the static sensing signals are generated at a first frame rate for a first exposure period, and the dynamic sensing signal are generated at a second frame rate for a second exposure period. The image processing circuit analyzes the static sensing signals and the dynamic sensing signals, outputs sub-frames of the sensing signals having the same frame rate in the sub-array region, and fuses the sub-frames each having a different frame rate by a specific ratio to generate a main frame.Type: ApplicationFiled: May 15, 2023Publication date: November 30, 2023Inventors: Ping-Hung Yin, Jia-Shyang Wang, Dean Wang
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Publication number: 20230388668Abstract: Provided is an image sensor circuit, including a pixel array and a plurality of different control circuits. The pixel array comprises a plurality of pixel circuit groups arranged in an array. Each pixel circuit group comprises a plurality of pixel circuits that generate corresponding sensitivity values over exposure duration. The pixel circuits include a first quantity of first pixel circuits, and a second quantity of second pixel circuits. The plurality of different control circuits are respectively coupled to different pixel circuits to control the exposure duration thereof with different transmission signals. The different control circuits are also set to control different pixel circuits to output photo-sensed values at different frame rates. The image sensor circuit periodically generates the pixel value of each pixel circuit group according to first and second exposure durations, first and second frame rates, and first and second light sensitivity values of each pixel circuit group.Type: ApplicationFiled: May 3, 2023Publication date: November 30, 2023Inventors: Ping-Hung Yin, Jia-Shyang Wang, Dean Wang
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Publication number: 20230370749Abstract: An image sensor and an image sensing method are provided. A readout circuit outputs a first digital sensing signal according to a floating diffusion node voltage of a first pixel circuit reset after a reset stage and a floating diffusion node voltage of a second pixel circuit reset after the reset stage during a reset signal readout period. The readout circuit outputs a second digital sensing signal according to a sensing result of the first pixel circuit and the floating diffusion node voltage of the second pixel circuit reset after the same reset stage during a sensing signal readout period. The image processing circuit judges whether a digital number of at least one of the first digital sensing signal and the second digital sensing signal is abnormal to decide to keep an original digital number, directly set a pixel value, or reset the second digital sensing signal.Type: ApplicationFiled: April 19, 2023Publication date: November 16, 2023Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTDInventors: Ping-Hung Yin, Jia-Shyang Wang, Dean Wang
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Publication number: 20230370743Abstract: An image sensor and an image sensing method are provided. The image sensor includes a first pixel circuit, a second pixel circuit, a ramp signal generating circuit, a comparator, and a signal processing circuit. The first pixel circuit has a first floating diffusion node. The second pixel circuit has a second floating diffusion node. The ramp signal generating circuit respectively provides a first ramp signal and a second ramp signal to the first floating diffusion node and the second floating diffusion node during a dark sun detection period. The comparator receives a first node voltage of the first floating diffusion node and a second node voltage of the second floating diffusion node. The signal processing circuit determines whether to output an output signal and determines whether to overwrite a digital value corresponding to a sensing signal according to whether the comparator is triggered.Type: ApplicationFiled: April 19, 2023Publication date: November 16, 2023Applicant: Guangzhou Tyrafos Semiconductor Technologies Co., LTDInventors: Ping-Hung Yin, Jia-Shyang Wang, Dean Wang
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Patent number: 11121261Abstract: A semiconductor substrate includes a substrate, a first metal oxide semiconductor layer, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, and a second metal oxide semiconductor layer. The first transistor includes a first metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a first gate of the first conductive layer, a first source of the second conductive layer, and a first drain of the second conductive layer. The second transistor includes a second metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a second gate of the first conductive layer, a second source of the second conductive layer, a second drain of the second conductive layer, and a third metal oxide semiconductor pattern of the second metal oxide semiconductor layer.Type: GrantFiled: February 5, 2020Date of Patent: September 14, 2021Assignee: Au Optronics CorporationInventors: Wei-Ting Lin, Dean Wang, Chun-Cheng Cheng
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Publication number: 20210005750Abstract: A semiconductor substrate includes a substrate, a first metal oxide semiconductor layer, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, and a second metal oxide semiconductor layer. The first transistor includes a first metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a first gate of the first conductive layer, a first source of the second conductive layer, and a first drain of the second conductive layer. The second transistor includes a second metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a second gate of the first conductive layer, a second source of the second conductive layer, a second drain of the second conductive layer, and a third metal oxide semiconductor pattern of the second metal oxide semiconductor layer.Type: ApplicationFiled: February 5, 2020Publication date: January 7, 2021Applicant: Au Optronics CorporationInventors: Wei-Ting Lin, Dean Wang, Chun-Cheng Cheng
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Patent number: 10807957Abstract: A tetradentate chelating monoquinoline derivative with a structure as shown in formula (I) is able to specifically chelate redox active metal ions like copper ions that are dis-regulated in neurodegenerative diseases (Alzheimer's disease, Huntington's disease, Parkinson's disease, and amyotrophic lateral sclerosis), or copper accumulation disease like Wilson's disease. The binding constants of these derivatives for zinc are 6-10 orders of magnitude below that ones for copper, and these derivatives have a good capability of reducing an oxidative stress. The method for preparing the derivative is simple and the derivatives have good application prospects in manufacturing drugs for neurodegenerative diseases and diseases related to disorder of copper metabolism.Type: GrantFiled: November 24, 2018Date of Patent: October 20, 2020Inventors: Yan Liu, Xingguo Liu, Weixin Zhang, Daya Huang, Meijie Huang, Dean Wang, Ju Huang, Siwei Shu, Michel Nguyen, Anne Robert, Bernard Meunier
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Publication number: 20190092730Abstract: A tetradentate chelating monoquinoline derivative with a structure as shown in formula (I) is able to specifically chelate redox active metal ions like copper ions that are dis-regulated in neurodegenerative diseases (Alzheimer's disease, Huntington's disease, Parkinson's disease, and amyotrophic lateral sclerosis), or copper accumulation disease like Wilson's disease. The binding constants of these derivatives for zinc are 6-10 orders of magnitude below that ones for copper, and these derivatives have a good capability of reducing an oxidative stress. The method for preparing the derivative is simple and the derivatives have good application prospects in manufacturing drugs for neurodegenerative diseases and diseases related to disorder of copper metabolism.Type: ApplicationFiled: November 24, 2018Publication date: March 28, 2019Inventors: Yan LIU, Xingguo LIU, Weixin ZHANG, Daya HUANG, Meijie HUANG, Dean WANG, Ju HUANG, Siwei SHU, Michel NGUTEN, Anne ROBERT, Bernard MEUNIER
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Patent number: 9984999Abstract: A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.Type: GrantFiled: May 5, 2016Date of Patent: May 29, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsun Lee, Dean Wang, Mirng-Ji Lii, Chen-Hua Yu
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Patent number: 9659918Abstract: A device includes a bottom package component that includes a bottom die, and a dam over a top surface of the bottom die. The dam has a plurality of sides forming a partial ring, with an air gap surrounded by the plurality of side portions. The air gap overlaps the bottom die. A top package component is bonded to the bottom package component, wherein the air gap separates a bottom surface of the top package component from the bottom die.Type: GrantFiled: February 12, 2016Date of Patent: May 23, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Dean Wang, Chen-Shien Chen, Chung-Shi Liu, Jiun Yi Wu
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Publication number: 20160247786Abstract: A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.Type: ApplicationFiled: May 5, 2016Publication date: August 25, 2016Inventors: Chien-Hsun Lee, Dean Wang, Mirng-Ji Lii, Chen-Hua Yu
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Publication number: 20160163683Abstract: A device includes a bottom package component that includes a bottom die, and a dam over a top surface of the bottom die. The dam has a plurality of sides forming a partial ring, with an air gap surrounded by the plurality of side portions. The air gap overlaps the bottom die. A top package component is bonded to the bottom package component, wherein the air gap separates a bottom surface of the top package component from the bottom die.Type: ApplicationFiled: February 12, 2016Publication date: June 9, 2016Inventors: Chen-Hua Yu, Dean Wang, Chen-Shien Chen, Chung-Shi Liu, Jiun Yi Wu
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Publication number: 20150137328Abstract: System and method for bonding semiconductor substrates is presented. A preferred embodiment comprises forming a buffer layer over a surface of a semiconductor substrate while retaining TSVs that protrude from the buffer layer in order to prevent potential voids that might form. A protective layer is formed on another semiconductor substrate that will be bonded to the first semiconductor substrate. The two substrates are aligned and bonded together, with the buffer layer preventing any short circuit contacts to the surface of the original semiconductor substrate.Type: ApplicationFiled: January 13, 2015Publication date: May 21, 2015Inventors: Dean Wang, Chen-Shien Chen, Kai-Ming Ching, Bo-I Lee, Chien-Hsiun Lee
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Patent number: 8932906Abstract: System and method for bonding semiconductor substrates is presented. A preferred embodiment comprises forming a buffer layer over a surface of a semiconductor substrate while retaining TSVs that protrude from the buffer layer in order to prevent potential voids that might form. A protective layer is formed on another semiconductor substrate that will be bonded to the first semiconductor substrate. The two substrates are aligned and bonded together, with the buffer layer preventing any short circuit contacts to the surface of the original semiconductor substrate.Type: GrantFiled: August 19, 2008Date of Patent: January 13, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Dean Wang, Chen-Shien Chen, Kai-Ming Ching, Bo-I Lee, Chien-Hsiun Lee
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Patent number: 8334170Abstract: A method for fabricating a semiconductor device is provided which includes providing a first device, a second device, and a third device, providing a first coating material between the first device and the second device, the first coating material being uncured, providing a second coating material between the second device and the third device, the second coating material being uncured, and thereafter, curing the first and second coating materials in a same process.Type: GrantFiled: June 27, 2008Date of Patent: December 18, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Dean Wang, Chien-Hsiun Lee, Chen-Shien Chen, Clinton Chao, Mirng-Ji Lii, Tjandra Winata Karta