Patents by Inventor Debajyoti Pal
Debajyoti Pal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170006154Abstract: Methods, systems, and devices are described for wired communication. A first distribution point uses sets of modems to communicate with a second distribution point over a crosstalk link to exchange information and coordinate the use of multiple sets of frequency bands. In some cases, the first distribution point may share a cable binder with the second distribution point and detect crosstalk on the subscriber lines in the cable binder. Based at least in part on the crosstalk detected by the first distribution point, the first and second distribution points may communicate over a crosstalk link between sets of lines in the binder. The distribution points may use one or more sets of predefined tones within the multiple sets of frequency bands to exchange messages, where the messages may include synchronization information, operating parameters, or control and data information.Type: ApplicationFiled: June 30, 2016Publication date: January 5, 2017Inventors: Avadhani Shridhar, Shailendra Kumar Singh, William Edward Keasler, JR., Debajyoti Pal
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Publication number: 20160380673Abstract: Methods, systems, and devices are described for wired communication. In one aspect, a distribution point may use a redundant number of digital subscriber line (DSL) lines that share a same cable binder to cancel crosstalk. For example a first distribution point may use a redundant number of lines, which may be virtualized lines, to cancel interference between lines controlled by the first distribution point and lines controlled by a second distribution point. In some cases, a distribution point may share precoding and cancelling coefficients with another distribution point over a cloud network or other service to enable vectoring without sharing transmitted data between the two distribution points. That is, the first distribution point may receive information related to crosstalk between sets of CPEs without receiving data transmitted by a separate distribution point sharing the same cable binder, and use the crosstalk related information to cancel crosstalk.Type: ApplicationFiled: June 22, 2016Publication date: December 29, 2016Inventors: Debajyoti Pal, Shailendra Kumar Singh
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Publication number: 20150372783Abstract: According to certain aspects, the present invention provides techniques to address G.fast and/or digital subscriber line (DSL) transmission at frequencies below and above 106 MHz in support of aggregate service rates well above 1 Gbps on short loops based on combining two independent first generation G.fast transceivers, each operating up to 106 MHz, into a single transceiver, capable of operating up to 212 MHz and achieving service rates of up to 2 Gbps. In these and other embodiments, a sub-band approach is used in which a total bandwidth is divided into two or more sub-bands, with communications for one or both of the first generation G.fast transceivers using one or both of the sub-bands, respectively.Type: ApplicationFiled: June 22, 2015Publication date: December 24, 2015Inventors: Debajyoti PAL, William Edward KEASLER, JR.
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Publication number: 20150372846Abstract: According to general aspects, embodiments of the invention provide an analog front end (AFE) capable of combining two independent 106 MHz G.fast baseband transmission channels into a single 212 MHz wide G.fast transmission channel. In these and other embodiments, an AFE according to the invention is also capable of interfacing to a single 212 MHz G.fast transmission channels as well as a single 106 MHz G.fast transmission channel.Type: ApplicationFiled: June 22, 2015Publication date: December 24, 2015Inventors: Debajyoti PAL, Echere IROAGA, William Edward KEASLER, JR.
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Publication number: 20150270942Abstract: According to certain general aspects, the present invention relates to methods for transmitting signals on twisted wire-pairs above 30 MHz using frequency division duplexing (FDD) in support of 1 Gb/s aggregate services on short loop lengths while maintaining spectral compatibility with legacy ADSL2 (?2.2 MHz bandwidth) and VDSL2 services (?30 MHz bandwidth). An advantage of the FDD approach for Gb/s transmission according to the invention is spectral compatibility with legacy DSL services without the sacrifice of any capacity of the wider band.Type: ApplicationFiled: March 19, 2015Publication date: September 24, 2015Inventors: Massimo SORBARA, Julien Daniel PONS, Avadhani SHRIDHAR, Debajyoti PAL
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Patent number: 8755394Abstract: Disclosed are various embodiments for a gateway device that can execute applications which can communicate with various devices in one or more home networks as well as one or more wide area networks. The gateway device can possess capabilities to communicate over various types of proprietary and/or standardized networks. Additionally, the gateway device can be equipped with the ability to communicate with home devices that are directly coupled to the gateway device. The gateway device can also include a mass storage component that allows storage of data on behalf of applications executed therein.Type: GrantFiled: May 6, 2011Date of Patent: June 17, 2014Assignee: Ikanos Communications, Inc.Inventors: Pramod Balkrishna Kaluskar, Debajyoti Pal
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Publication number: 20110277001Abstract: Disclosed are various embodiments for a gateway device that can execute applications which can communicate with various devices in one or more home networks as well as one or more wide area networks. The gateway device can possess capabilities to communicate over various types of proprietary and/or standardized networks. Additionally, the gateway device can be equipped with the ability to communicate with home devices that are directly coupled to the gateway device. The gateway device can also include a mass storage component that allows storage of data on behalf of applications executed therein.Type: ApplicationFiled: May 6, 2011Publication date: November 10, 2011Applicant: Ikanos Communications, Inc.Inventors: Pramod Balkrishna Kaluskar, Debajyoti Pal
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Publication number: 20100119012Abstract: A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.Type: ApplicationFiled: November 11, 2008Publication date: May 13, 2010Inventor: Debajyoti Pal
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Publication number: 20100118923Abstract: A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.Type: ApplicationFiled: November 11, 2008Publication date: May 13, 2010Inventor: Debajyoti Pal
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Publication number: 20100118924Abstract: A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.Type: ApplicationFiled: November 11, 2008Publication date: May 13, 2010Inventor: Debajyoti Pal
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Publication number: 20100119008Abstract: A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.Type: ApplicationFiled: November 11, 2008Publication date: May 13, 2010Inventor: Debajyoti Pal
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Publication number: 20100119009Abstract: A receiver uses a wideband intermediate frequency (IF) in the analog domain and performs low IF down-conversion in the digital domain, using low-power, high-speed, high resolution analog-to-digital converters. The receiver can be integrated into an integrated circuit as one of several receivers. Such an integrated circuit may include multiple transmitters using adaptive non-linear modeling pre-distortion. The non-linear modeling may include memory. Imbalance in intermediate frequency in-phase and quadrature signals may be corrected in the digital domains. DC offsets in the intermediate signal may be corrected in both analog and digital domains. In one instance, the receiver provides a feedback receiver for the adaptive pre-distorter in a transmitter on the integrated circuit.Type: ApplicationFiled: November 11, 2008Publication date: May 13, 2010Inventor: Debajyoti Pal
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Publication number: 20060262842Abstract: A method separates a source signal from an interfering signal contain in signals received at multiple sensors. The method estimates the source signal using an adaptive filter characterized by a set of filter coefficients, which are updated by maximizing a distance of the estimated source signal from a Gaussian signal having the same variance as the source signal. In one implementation, the adaptive filter is an adaptive linear combiner. The distance of the estimated source signal from the Gaussian signal may be provided by calculating an entropy function. In one implementation, the distance from Gaussian is estimated using an expectation function involving a fourth moment and a second moment of the source signal.Type: ApplicationFiled: May 20, 2005Publication date: November 23, 2006Inventor: Debajyoti Pal
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Patent number: 6813311Abstract: The present invention, generally speaking, provides for cancellation of non-linear distortions within the echo path of a communications system by characterizing the nonlinearity, performing digital processing of a data signal to cause substantially the same nonlinearity to be applied to the data signal, and inputting a resulting data signal to a non-linear echo-cancellation path. In an exemplary embodiment, the non-linear echo-cancellation path includes as a nonlinear echo canceller a transversal filter or the like. A separate linear echo cancellation path is also provided. Training of the nonlinear echo canceller follows training of the linear echo canceller. This technique is particularly applicable to cancelling the effects of DAC nonlinearity, which can be readily characterized. Using this technique, cancellation improvement of about 3dB can readily be obtained. Alternatively, instead of achieving a lower residual echo floor, the linearity requirements for the transmit DAC can be relaxed.Type: GrantFiled: March 14, 2000Date of Patent: November 2, 2004Assignee: Globespan Virata CorporationInventors: Debajyoti Pal, Chung-Li Lu, Sujai Chari
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Patent number: 6643676Abstract: The present invention, generally speaking, accelerates convergence of a fast RLS adaptation algorithm by, following processing of a burst of data, performing postprocessing to remove the effects of prewindowing, fictitious data initialization, or both. This postprocessing is part of a burst mode adaptation strategy in which data (signals) get processed in chunks (bursts). Such a burst mode processing approach is applicable whenever the continuous adaptation of the filter is not possible (algorithmic complexity too high to run in real time) or not required (optimal filter setting varies only slowly with time). Postprocessing consists of a series of “downdating” operations (as opposed to updating) that in effect advance the beginning point of the data window. The beginning point is advanced beyond fictitious data used for initialization and beyond a prewindowing region. In other variations, downdating is applied to data within a prewindowing region only.Type: GrantFiled: April 19, 2000Date of Patent: November 4, 2003Assignee: Virata CorporationInventors: Dirk Slock, Debajyoti Pal
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Publication number: 20030202612Abstract: An embodiment of the present invention is directed to a rate enhanced system for supporting duplex transmission of symmetric data rates. The system comprises an encoder comprising a serial to parallel converter for receiving a serial data bit, and for generating a parallel word having M bits; a convolutional encoder for receiving a first bit of the M bits of the parallel word, and for generating two encoded bits; and a mapper for receiving the two encoded bits and the remaining M−1 bits of the parallel word, and for generating a symbol; wherein M is greater than three.Type: ApplicationFiled: December 18, 2002Publication date: October 30, 2003Inventors: Bijit Halder, Debajyoti Pal, Alper Tunga Erdogan
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Patent number: 6542477Abstract: The present invention, generally speaking, provides a digitally-tunable, echo-cancelling analog front end (AFE) for wireline digital communications. The analog front end is especially useful in a High-bit-rate Digital Subscriber Line (HDSL) or HDSL2 environment. An analog echo simulation path is provided capable of simulating echo from a wide variety of echo paths. Digitally controlled attenuators are provided in the transmission path and in the analog echo simulation path. Also provided is a digital-tunable equalizer stage. The equalizer stage is tuned to match the characteristics of the receive path. The same arrangement may be adapted for various DSL technologies, i.e., xDSL. There results an analog front end that is well-adapted to high-speed wireline communications.Type: GrantFiled: March 31, 1999Date of Patent: April 1, 2003Assignee: Virata CorporationInventors: Debajyoti Pal, Sujai Chari, Christopher Hansen, Chung-Li Lu
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Patent number: 6353629Abstract: Improved techniques for time domain equalization are disclosed. The improved techniques include (i) improved time domain equalization techniques referred to as poly-path time domain equalization techniques; (ii) improved training methods for training transmitters and/or receivers of a data transmission system; and (iii) techniques for providing time domain equalization to a transmitter side of a data transmission system. These techniques are particularly suitable for time domain equalization in multicarrier modulation systems where channel shortening provided by time domain equalization is particularly needed.Type: GrantFiled: April 24, 1998Date of Patent: March 5, 2002Assignee: Texas Instruments IncorporatedInventor: Debajyoti Pal
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Patent number: 5694349Abstract: A high speed, low power parallel multiplier is described. The parallel multiplier includes specialized hardware circuitry designed to perform complex multiplication operations at high speeds. The parallel multiplier requires significantly less die area than conventionally required, which results in reduced manufacturing costs and reduced power consumption.Type: GrantFiled: March 29, 1996Date of Patent: December 2, 1997Assignee: Amati Communications Corp.Inventor: Debajyoti Pal
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Patent number: 5542101Abstract: Signals from multiple signal paths are received using a multi-element antenna and a beam-forming network. Signals from each of the antenna elements are sampled to form a sample vector. Several sample vectors are used to form an auto-covariance matrix. A singular value decomposition of the auto-covariance matrix is used to form three matrices. The first matrix is used to determine the number of signal paths and the second matrix is used to form several polynomials. The polynomial roots that are on or near the unit circle are used to determine points on the unit circle that are associated with each signal path. Each point on the unit circle is used to calculate weights for a beam-forming network that forms a receive beam for each signal path.Type: GrantFiled: November 19, 1993Date of Patent: July 30, 1996Assignee: AT&T Corp.Inventor: Debajyoti Pal