Patents by Inventor Debal K. Mridha

Debal K. Mridha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9122629
    Abstract: The invention provides an elastic or flexible SSD cache utilizing a hybrid RAID protocol combining RAID-0 protocol for read data and RAID-5 single parity protocol for write data in the same cache array. Read data may be stored in window sized allocations using RAID-0 protocol to avoid allocating an entire RAID stripe for read cache data. In the same SSD volume, dirty write data is stored in row allocations using RAID-5 protocol to provide single parity for the dirty write data. Read data is typically stored a window from the physical device having the largest number of available windows. Write data is stored in a row including the next available window in each arm, which decouples the window structure of the rows from the stripe configuration of the physical memory devices.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: September 1, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Debal K. Mridha, Luca Bert
  • Patent number: 9037799
    Abstract: System and techniques for rebuilding a redundant secondary storage cache including a first storage device and a second storage device are described. A metadata entry indicative of a validity of a portion of information stored by a first storage cache device and associated with a region of a primary storage device is received. When the validity of the portion of information associated with the region of the primary storage device is established, a region lock is requested on the region of the primary storage device associated with the portion of information stored by the first storage cache device. Then, the portion of information and the corresponding metadata entry associated with the region of the primary storage device is copied from the first cache storage device to a second storage cache device to rebuild the second storage cache device.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: May 19, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte Ltd
    Inventors: Sujan Biswas, Karimulla Sheik, Sumanesh Samanta, Debal K. Mridha, Naga S. Vadalamani
  • Publication number: 20140229676
    Abstract: System and techniques for rebuilding a redundant secondary storage cache including a first storage device and a second storage device are described. A metadata entry indicative of a validity of a portion of information stored by a first storage cache device and associated with a region of a primary storage device is received. When the validity of the portion of information associated with the region of the primary storage device is established, a region lock is requested on the region of the primary storage device associated with the portion of information stored by the first storage cache device. Then, the portion of information and the corresponding metadata entry associated with the region of the primary storage device is copied from the first cache storage device to a second storage cache device to rebuild the second storage cache device.
    Type: Application
    Filed: February 11, 2013
    Publication date: August 14, 2014
    Applicant: LSI Corporation
    Inventors: Sujan Biswas, Karimulla Sheik, Sumanesh Samanta, Debal K. Mridha, Naga S. Vadalamani
  • Publication number: 20140068181
    Abstract: The invention provides an elastic or flexible SSD cache utilizing a hybrid RAID protocol combining RAID-0 protocol for read data and RAID-5 single parity protocol for write data in the same cache array. Read data may be stored in window sized allocations using RAID-0 protocol to avoid allocating an entire RAID stripe for read cache data. In the same SSD volume, dirty write data is stored in row allocations using RAID-5 protocol to provide single parity for the dirty write data. Read data is typically stored a window from the physical device having the largest number of available windows. Write data is stored in a row including the next available window in each arm, which decouples the window structure of the rows from the stripe configuration of the physical memory devices.
    Type: Application
    Filed: September 6, 2012
    Publication date: March 6, 2014
    Applicant: LSI CORPORATION
    Inventors: Debal K. Mridha, Luca Bert