Patents by Inventor Debarnab Mitra

Debarnab Mitra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260058755
    Abstract: Methods, systems, and devices for wireless communications are described. A wireless device may receive a signal including a polar encoded control message. A message payload of the polar encoded control message may be associated with known bits information that may indicate one or more bit positions of one or more known bits and a respective bit value for each of the one or more known bits. The wireless device may perform successive cancellation list polar decoding on the signal to obtain the message payload of the polar encoded control message by generating list decoding bit sequences. A path metric of a list decoding bit sequence may be based on application of a bias penalty value to one or more bit decisions in the list decoding bit sequence that differ from a known bit value at a bit position in accordance with the known bits information.
    Type: Application
    Filed: August 21, 2024
    Publication date: February 26, 2026
    Inventors: Debarnab MITRA, Solmaz NIKNAM, Seyyed Ali HASHEMI, Hobin KIM, Hari SANKAR, Wei YANG, Jing JIANG
  • Patent number: 12176918
    Abstract: An embodiment of an electronic apparatus may comprise one or more substrates, and a decoder coupled to the one or more substrates, the decoder including logic to perform a first decode stage with a first fixed quantization width, and perform a second decode stage with a second fixed quantization width that is different from the first fixed quantization width. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: December 24, 2024
    Assignee: Intel Corporation
    Inventors: Debarnab Mitra, Santhosh K. Vanaparthy
  • Patent number: 12169435
    Abstract: An embodiment of an electronic apparatus comprises one or more substrates, and logic coupled to the one or more substrates, the logic to detect unreliable messages between check nodes and variable nodes in association with an error correction operation, determine respective degrees of unreliability for the unreliable messages, and reduce an influence of the unreliable messages on the error correction operation, as compared to an influence of reliable messages between the check nodes and the variables nodes, based on the determined respective degrees of unreliability. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: December 17, 2024
    Assignee: Intel Corporation
    Inventors: Debarnab Mitra, Zion S. Kwok, Ravi H. Motwani
  • Publication number: 20210175901
    Abstract: An embodiment of an electronic apparatus may comprise one or more substrates, and a decoder coupled to the one or more substrates, the decoder including logic to perform a first decode stage with a first fixed quantization width, and perform a second decode stage with a second fixed quantization width that is different from the first fixed quantization width. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: February 23, 2021
    Publication date: June 10, 2021
    Applicant: Intel Corporation
    Inventors: Debarnab Mitra, Santhosh K. Vanaparthy
  • Publication number: 20210165712
    Abstract: An embodiment of an electronic apparatus comprises one or more substrates, and logic coupled to the one or more substrates, the logic to detect unreliable messages between check nodes and variable nodes in association with an error correction operation, determine respective degrees of unreliability for the unreliable messages, and reduce an influence of the unreliable messages on the error correction operation, as compared to an influence of reliable messages between the check nodes and the variables nodes, based on the determined respective degrees of unreliability. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: February 9, 2021
    Publication date: June 3, 2021
    Applicant: Intel Corporation
    Inventors: Debarnab Mitra, Zion S. Kwok, Ravi H. Motwani