Patents by Inventor Debarshi Chatterjee

Debarshi Chatterjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8819687
    Abstract: Some embodiments of a multi processor system implement a virtual-time-based quality-of-service scheduling technique. In at least one embodiment of the invention, a method includes scheduling a memory request to a memory from a memory request queue in response to expiration of a virtual finish time of the memory request. The virtual finish time is based on a share of system memory bandwidth associated with the memory request. The method includes scheduling the memory request to the memory from the memory request queue before the expiration of the virtual finish time of the memory request if a virtual finish time of each other memory request in the memory request queue has not expired and based on at least one other scheduling rule.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: August 26, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Patent number: 8667493
    Abstract: Some embodiments of a processing system implement a memory-controller-parallelism-aware scheduling technique. In at least one embodiment of the invention, a method of operating a processing system includes scheduling a memory request requested by a thread of a plurality of threads executing on at least one processor according to thread priority information associated with the plurality of threads. The thread priority information is based on a maximum of a plurality of local memory bandwidth usage indicators for each thread of the plurality of threads. Each of the plurality of local memory bandwidth usage indicators for each thread corresponds to a respective memory controller of a plurality of memory controllers.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: March 4, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Patent number: 8522244
    Abstract: In at least one embodiment, a method includes locally scheduling a memory request requested by a thread of a plurality of threads executing on at least one processor. The memory request is locally scheduled according to a quality-of-service priority of the thread. The quality-of-service priority of the thread is based on a quality of service indicator for the thread and system-wide memory bandwidth usage information for the thread. In at least one embodiment, the method includes determining the system-wide memory bandwidth usage information for the thread based on local memory bandwidth usage information associated with the thread periodically collected from a plurality of memory controllers during a timeframe. In at least one embodiment, the method includes at each mini-timeframe of the timeframe accumulating the system-wide memory bandwidth usage information for the thread and updating the quality-of-service priority based on the accumulated system-wide memory bandwidth usage information for the thread.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: August 27, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Patent number: 8505016
    Abstract: In at least one embodiment of the invention, a method includes scheduling a memory request associated with a thread executing on a processing system. The scheduling is based on a job length of the thread and a priority step function of job length. The thread is one of a plurality of threads executing on the processing system. In at least one embodiment of the method, the priority step function is a function of ?x/2n? for x<=m and P(x)=m/2n for x>m, where x is the number of memory requests in a memory request queue and n and m are integers. In at least one embodiment of the method, the priority step function is a function of 2n×? log2(x)?, where x is the number of memory requests in a memory request queue and n is an integer.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: August 6, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Publication number: 20120036512
    Abstract: In at least one embodiment of the invention, a method includes scheduling a memory request associated with a thread executing on a processing system. The scheduling is based on a job length of the thread and a priority step function of job length. The thread is one of a plurality of threads executing on the processing system. In at least one embodiment of the method, the priority step function is a function of ?x/2n? for x<=m and P(x)=m/2n for x>m, where x is the number of memory requests in a memory request queue and n and m are integers. In at least one embodiment of the method, the priority step function is a function of 2n×?log2(x)?, where x is the number of memory requests in a memory request queue and n is an integer.
    Type: Application
    Filed: August 5, 2010
    Publication date: February 9, 2012
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Publication number: 20110276974
    Abstract: Some embodiments of a multi processor system implement a virtual-time-based quality-of-service scheduling technique. In at least one embodiment of the invention, a method includes scheduling a memory request to a memory from a memory request queue in response to expiration of a virtual finish time of the memory request. The virtual finish time is based on a share of system memory bandwidth associated with the memory request. The method includes scheduling the memory request to the memory from the memory request queue before the expiration of the virtual finish time of the memory request if a virtual finish time of each other memory request in the memory request queue has not expired and based on at least one other scheduling rule.
    Type: Application
    Filed: May 7, 2010
    Publication date: November 10, 2011
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Publication number: 20110276973
    Abstract: In at least one embodiment, a method includes locally scheduling a memory request requested by a thread of a plurality of threads executing on at least one processor. The memory request is locally scheduled according to a quality-of-service priority of the thread. The quality-of-service priority of the thread is based on a quality of service indicator for the thread and system-wide memory bandwidth usage information for the thread. In at least one embodiment, the method includes determining the system-wide memory bandwidth usage information for the thread based on local memory bandwidth usage information associated with the thread periodically collected from a plurality of memory controllers during a timeframe. In at least one embodiment, the method includes at each mini-timeframe of the timeframe accumulating the system-wide memory bandwidth usage information for the thread and updating the quality-of-service priority based on the accumulated system-wide memory bandwidth usage information for the thread.
    Type: Application
    Filed: May 7, 2010
    Publication date: November 10, 2011
    Inventors: Jaewoong Chung, Debarshi Chatterjee
  • Publication number: 20110276972
    Abstract: Some embodiments of a processing system implement a memory-controller-parallelism-aware scheduling technique. In at least one embodiment of the invention, a method of operating a processing system includes scheduling a memory request requested by a thread of a plurality of threads executing on at least one processor according to thread priority information associated with the plurality of threads. The thread priority information is based on a maximum of a plurality of local memory bandwidth usage indicators for each thread of the plurality of threads. Each of the plurality of local memory bandwidth usage indicators for each thread corresponds to a respective memory controller of a plurality of memory controllers.
    Type: Application
    Filed: May 7, 2010
    Publication date: November 10, 2011
    Inventors: Jaewoong Chung, Debarshi Chatterjee