Patents by Inventor Debayan Das

Debayan Das has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129104
    Abstract: An apparatus, system, and method for protecting a component from an observation attack are provided. A power balancing circuit configured to protect a cryptography component can include a ring oscillator electrically connected to a power supply, a time-to-digital converter (TDC) electrically connected to monitor an electrical parameter of the electrical power drawn by the cryptography component and provide data indicative of the electrical parameter, and a controller circuit configured to adjust a number of inverters of the ring oscillator drawing power from the power supply based on the data.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 18, 2024
    Inventors: Jason M. Fung, Debayan Das, Sayak Ray, Rana Elnaggar, Majid Sabbagh
  • Patent number: 11216594
    Abstract: Embodiments are directed to countermeasures against hardware side-channel attacks on cryptographic operations. An embodiment of an apparatus includes multiple crypto cores; and a current source including multiple current source blocks, the current source blocks including a respective current source block associated with each of the crypto cores, and wherein the current sources blocks are switchable to switch on a current source block associated with each active core of the multiple crypto cores and to switch off a current source associated with each inactive core of the multiple cryptographic cores.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: January 4, 2022
    Assignee: INTEL CORPORATION
    Inventors: Santosh Ghosh, Debayan Das, Carlos Tokunaga, Avinash L. Varna, Joseph Friel
  • Publication number: 20190318130
    Abstract: Embodiments are directed to countermeasures against hardware side-channel attacks on cryptographic operations. An embodiment of an apparatus includes multiple crypto cores; and a current source including multiple current source blocks, the current source blocks including a respective current source block associated with each of the crypto cores, and wherein the current sources blocks are switchable to switch on a current source block associated with each active core of the multiple crypto cores and to switch off a current source associated with each inactive core of the multiple cryptographic cores.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Applicant: Intel Corporation
    Inventors: Santosh Ghosh, Debayan Das, Carlos Tokunaga, Avinash L. Varna, Joseph Friel