Abstract: The reduction of feedback capacitance in active semiconductor devices, such as the reduction in collector to base capacitance in transistors, is described. In one example, a transistor includes a substrate, an active region of the transistor in the substrate, a dielectric layer over a top surface of the substrate, and an interconnect region. The active region includes a base contact over the active region. The interconnect region includes a conductive interconnect that extends over the dielectric layer and is electrically coupled with the base contact. The interconnect region also includes a semiconductor junction region extending under the conductive interconnect in an area of the substrate outside of the active region. The addition of the semiconductor junction region under the conductive interconnect reduces the total collector to base capacitance in the transistor.

Abstract: Landing metal layers with improved adhesion to semiconductor substrates are described, along with semiconductor structures including the landing metal layers and components using the landing metal layers. An example semiconductor device includes a substrate with top and bottom surfaces, a landing metal layer over the top surface of the substrate, a via that extends through the substrate, and a bottom side metal layer. The bottom side metal layer extends over sidewalls of the via and electrically contacts an underside of the landing metal layer. For improved adhesion, the landing metal layer is diffused at least in part into the top surface of the substrate. The landing metal layer is diffused into the top surface of the substrate by an annealing or alloying process, and the techniques described herein help to avoid the delamination of the landing metal layer from the top surface of the substrate.

Abstract: The reduction of feedback capacitance in active semiconductor devices, such as the reduction in collector to base capacitance in transistors, is described. In one example, a transistor includes a substrate, an active region of the transistor in the substrate, a dielectric layer over a top surface of the substrate, and an interconnect region. The active region includes a base contact over the active region. The interconnect region includes a conductive interconnect that extends over the dielectric layer and is electrically coupled with the base contact. The interconnect region also includes a semiconductor junction region extending under the conductive interconnect in an area of the substrate outside of the active region. The addition of the semiconductor junction region under the conductive interconnect reduces the total collector to base capacitance in the transistor.