Patents by Inventor Debjit Roy

Debjit Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240054341
    Abstract: Examples of analyzing a plurality of operating parameters of a computing device are described. In an example, current operating parameters of a target computing device may be analyzed based on a first model and a second model. A first model may be trained based on a set of environment-related parameters. A second model may incorporate a set of global weights, wherein the global weights may be based on a set of environment-agnostic parameters.
    Type: Application
    Filed: December 17, 2020
    Publication date: February 15, 2024
    Inventors: PRAKASH REDDY, AMIT KUMAR, UTKARSH SIDDU, DEBJIT ROY, HARIHARAN RAJARAM
  • Publication number: 20230315048
    Abstract: Examples of systems for detecting anomaly in a print job performed by a three-dimensional printer are described herein. In an example, a data set pertaining to a set of layers printed based on a print job of the 3D printer may be processed by an anomaly detection engine. Thereafter, a data set of a layer being printed by the 3D printer may be obtained. Based on the data set of the set of layers and the data set of the layer being printed, an anomaly may be detected in real-time.
    Type: Application
    Filed: August 28, 2020
    Publication date: October 5, 2023
    Inventors: Amit KUMAR, Hariharan RAJARAM, Debjit ROY, Prakash REDDY
  • Patent number: 11437151
    Abstract: Present invention discloses method and system for providing an optimized layout plan for a site. Method comprising tracking inter-zone movement of at least one person operating in one or more zones at the site, generating inter-zone movement sequence from the inter-zone movement and classifying the inter-zone movement sequence into at least one of primary movement, secondary movement and tertiary movement. Thereafter, method comprising determining a dependency of the primary movement on the secondary movement of the at least one person while executing a primary task by the at least one person and generating the optimized layout plan for the site based on at least one of the primary movement, the secondary movement, the tertiary movement of the at least one person, the dependency of the primary movement on the secondary movement of the at least one person and existing layout parameters of the site.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: September 6, 2022
    Assignee: Alluvium IOT Solutions PVT LTD
    Inventors: Debjit Roy, Suraj Rajan
  • Publication number: 20210280324
    Abstract: Present invention discloses method and system for providing an optimized layout plan for a site. Method comprising tracking inter-zone movement of at least one person operating in one or more zones at the site, generating inter-zone movement sequence from the inter-zone movement and classifying the inter-zone movement sequence into at least one of primary movement, secondary movement and tertiary movement. Thereafter, method comprising determining a dependency of the primary movement on the secondary movement of the at least one person while executing a primary task by the at least one person and generating the optimized layout plan for the site based on at least one of the primary movement, the secondary movement, the tertiary movement of the at least one person, the dependency of the primary movement on the secondary movement of the at least one person and existing layout parameters of the site.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 9, 2021
    Inventors: Debjit Roy, Suraj Rajan
  • Patent number: 10203882
    Abstract: Embodiments herein provide a method for managing multiple bandwidth boost solutions co-existing in an electronic device. The method includes identifying an ongoing data session associated with at least one of a first bandwidth boost solution and a second bandwidth boost solution. The method includes dynamically selecting at least one bandwidth boost solution based on at least one parameter. The method includes managing multiple bandwidth boost solutions, wherein the bandwidth boost solution can be either network dependent or independent bandwidth boost solution. The method includes determining that the identified event corresponds to a particular bandwidth boost solution or a combination of bandwidth boost solutions. The method includes dynamically selecting another bandwidth boost solution or a combination of bandwidth boost solutions upon determining that the identified event corresponds to a particular bandwidth boost solution or a combination of bandwidth boost solutions.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: February 12, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Venkata Ratnakar Rao Rayavarapu, Bhagwan Dass Swami, Debjit Roy, Giri Venkata Prasad Reddy Chintakuntla, Jae-Won Jang, Kyoung-Jin Moon, Madhan Raj Kanagarathinam, Ranjith Kumar, Siva Sabareesh Dronamraju, Sunil Kumar Venkata, Vijay Kumar Mishra
  • Publication number: 20160308707
    Abstract: Embodiments herein provide a method for managing multiple bandwidth boost solutions co-existing in an electronic device. The method includes identifying an ongoing data session associated with at least one of a first bandwidth boost solution and a second bandwidth boost solution. The method includes dynamically selecting at least one bandwidth boost solution based on at least one parameter. The method includes managing multiple bandwidth boost solutions, wherein the bandwidth boost solution can be either network dependent or independent bandwidth boost solution. The method includes determining that the identified event corresponds to a particular bandwidth boost solution or a combination of bandwidth boost solutions. The method includes dynamically selecting another bandwidth boost solution or a combination of bandwidth boost solutions upon determining that the identified event corresponds to a particular bandwidth boost solution or a combination of bandwidth boost solutions.
    Type: Application
    Filed: April 18, 2016
    Publication date: October 20, 2016
    Inventors: Venkata Ratnakar Rao Rayavarapu, Bhagwan Dass Swami, Debjit Roy, Giri Venkata Prasad Reddy Chintakuntla, Jae-Won Jang, Kyoung-Jin Moon, Madhan Raj Kanagarathinam, Ranjith Kumar, Siva Sabareesh Dronamraju, Sunil Kumar Venkata, Vijay Kumar Mishra
  • Patent number: 8806282
    Abstract: An apparatus for providing a data integrity field implementation in a data processing system includes a controller operative to interface between a host device and a destination device in the data processing system for transferring at least one data block therebetween. The data processing system further includes an error detection module associated with the controller. The error detection module is operative to determine a probability of an error occurrence based at least in part on a measured current error rate for the data processing system. The controller is operative to implement an error correction methodology which is selectively adaptable as a function of the probability of an error occurrence.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: August 12, 2014
    Assignee: LSI Corporation
    Inventors: Varun Shetty, Debjit Roy Choudhury, Dipankar Das, Ashank Reddy
  • Patent number: 8804153
    Abstract: A method for printing a print ready file transmitted by a print client on an imaging device includes creating a print data file associated with the print ready file, where the print data file includes information pertaining to the print ready file and the imaging device. In the method, the print data file is encrypted and transmitted to the imaging device. In addition, the print data file is authenticated in the imaging device and printing of the print ready file is enabled if the print data file is determined to be authentic and the print ready file is invalidated if the print data file is determined to be inauthentic. Also disclosed is an imaging device configured to perform the aforementioned method.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: August 12, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Tukun Chakraborty, Zakir Ahmed, Debjit Roy, Kah Kit Cheong, Kok Mun Stephen Cheng
  • Publication number: 20140115229
    Abstract: Method and system for providing increased frequency of flash memories compatible to Serial Peripheral Interface (SPI) bus protocol by delayed data capturing so that system boot loader down load time reduces for a given memory configuration. Methods and systems are provided for operating the memory at the device rated frequency.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: LSI CORPORATION
    Inventors: Srinivasa Rao Kothamasu, Debjit Roy Choudhury, Sreenath Shambu Ramakrishna, Ravindra Bidnur
  • Patent number: 8667196
    Abstract: A method and apparatus are provided for mapping addresses between one or more slave devices and at least one corresponding master device in a multilayer interconnect system including a plurality of bus matrices for interfacing between the one or more slave devices and the master device. The method and apparatus are operative for receiving an address map corresponding to the system, receiving information regarding connectivity of one or more slave devices through at least one of the bus matrices, determining whether the master device has more than one default slave unit associated therewith, and, when the master device has more than one default slave unit associated therewith, generating first and second address mappings and configuring the system to have no more than one default slave unit per master device.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: March 4, 2014
    Assignee: LSI Corporation
    Inventors: Srinivasa Rao Kothamasu, Debjit Roy Choudhury, Dharmesh Kishor Tirthdasani, Sajith Kizhakke Kalathil Achuthan Kutty, Jean Jacob
  • Publication number: 20140025852
    Abstract: A bus interconnect for interconnecting one or more master devices with one or more slave devices in a system includes at least one slave interface module adapted for communicating with a corresponding one of the master devices and at least one master interface module adapted for communicating with a corresponding one of the slave devices. The bus interconnect further includes a configurable response module coupled with the slave interface module. The configurable response module is operative to generate different configurable responses associated with access requests to corresponding portions of an address space of the system.
    Type: Application
    Filed: July 19, 2012
    Publication date: January 23, 2014
    Applicant: LSI CORPORATION
    Inventors: Sreenath Shambu Ramakrishna, Srinivasa Rao Kothamasu, Debjit Roy Choudhury
  • Publication number: 20130314819
    Abstract: An electronic storage system includes a first cylindrical storage area. The first cylindrical storage area is configured to rotate about an axis. The first cylindrical storage area includes a first storage surface. The storage system further includes a first access head, configured to access information stored on the first storage surface, and a first head arm. The first access head is disposed on the first head arm. A corresponding method, cylindrical storage area, and head access assembly are also provided.
    Type: Application
    Filed: May 28, 2012
    Publication date: November 28, 2013
    Applicant: LSI CORPORATION
    Inventors: Debjit Roy Choudhury, Srinivasa Rao Kothamasu, Karthik Satyanarayan Murthy Akella
  • Publication number: 20130318322
    Abstract: A memory management apparatus includes a first controller adapted to receive an input data sequence including one or more data frames and operative: to separate each of the data frames into a payload data portion and a header portion; to store the payload data portion in at least one available memory location in a physical storage space; and to store in a logical storage space the header portion along with at least one associated index indicating where in the physical storage space the corresponding payload data portion resides. The apparatus further includes a second controller operative, as a function of a data read request, to access the physical storage space using the header portion and associated index from the logical storage space to retrieve the corresponding payload data portion and to combine the header portion with the payload data portion to generate a response to the data read request.
    Type: Application
    Filed: May 28, 2012
    Publication date: November 28, 2013
    Applicant: LSI CORPORATION
    Inventors: Varun Shetty, Dipankar Das, Debjit Roy Choudhury, Ashank Reddy
  • Publication number: 20130290582
    Abstract: A method and apparatus are provided for mapping addresses between one or more slave devices and at least one corresponding master device in a multilayer interconnect system including a plurality of bus matrices for interfacing between the one or more slave devices and the master device. The method and apparatus are operative for receiving an address map corresponding to the system, receiving information regarding connectivity of one or more slave devices through at least one of the bus matrices, determining whether the master device has more than one default slave unit associated therewith, and, when the master device has more than one default slave unit associated therewith, generating first and second address mappings and configuring the system to have no more than one default slave unit per master device.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Applicant: LSI CORPORATION
    Inventors: Srinivasa Rao Kothamasu, Debjit Roy Choudhury, Dharmesh Kishor Tirthdasani, Sajith K. A., Jean Jacob
  • Publication number: 20130219234
    Abstract: An apparatus for providing a data integrity field implementation in a data processing system includes a controller operative to interface between a host device and a destination device in the data processing system for transferring at least one data block therebetween. The data processing system further includes an error detection module associated with the controller. The error detection module is operative to determine a probability of an error occurrence based at least in part on a measured current error rate for the data processing system. The controller is operative to implement an error correction methodology which is selectively adaptable as a function of the probability of an error occurrence.
    Type: Application
    Filed: February 16, 2012
    Publication date: August 22, 2013
    Applicant: LSI CORPORATION
    Inventors: Varun Shetty, Debjit Roy Choudhury, Dipankar Das, Ashank Reddy
  • Publication number: 20100110469
    Abstract: A method for printing a print ready file transmitted by a print client on an imaging device includes creating a print data file associated with the print ready file, where the print data file includes information pertaining to the print ready file and the imaging device. In the method, the print data file is encrypted and transmitted to the imaging device. In addition, the print data file is authenticated in the imaging device and printing of the print ready file is enabled if the print data file is determined to be authentic and the print ready file is invalidated if the print data file is determined to be inauthentic. Also disclosed is an imaging device configured to perform the aforementioned method.
    Type: Application
    Filed: April 16, 2007
    Publication date: May 6, 2010
    Inventors: Tukun Chakraborty, Zakir Ahmed, Debjit Roy, Kah Kit Cheong, Kok Mun Stephen Cheng