Patents by Inventor Deborah M. Massey
Deborah M. Massey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11054459Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: GrantFiled: November 7, 2019Date of Patent: July 6, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Patent number: 10996259Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: GrantFiled: January 3, 2020Date of Patent: May 4, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Patent number: 10989754Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: GrantFiled: November 16, 2017Date of Patent: April 27, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Publication number: 20200141996Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: ApplicationFiled: January 3, 2020Publication date: May 7, 2020Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Publication number: 20200072897Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: ApplicationFiled: November 7, 2019Publication date: March 5, 2020Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Patent number: 10564214Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: GrantFiled: June 22, 2017Date of Patent: February 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Publication number: 20180074114Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: ApplicationFiled: November 16, 2017Publication date: March 15, 2018Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Patent number: 9851397Abstract: A system for electromigration testing is disclosed. The system includes a conductive member, a cap layer of insulative material over at least a portion of a top surface of the conductive member, a cathode conductively connected to a first end of the conductive member; an anode conductively connected to a second end of the conductive member, and a current source conductively connected to the cathode and the anode. A plurality of sensory pins are disposed along a length of the conductive member between the first end and the second end of the conductive member. The sensory pins are conductively connected to a bottom surface of the conductive member. At least one measurement device is conductively connected to at least one sensory pin of the plurality of sensory pins. The at least one measurement device determines a resistance of at least one portion of the conductive member.Type: GrantFiled: March 2, 2015Date of Patent: December 26, 2017Assignee: GLOBALFOUNDRIES INC.Inventors: Fen Chen, Cathryn J. Christiansen, Deborah M. Massey, Prakash Periasamy, Michael A. Shinosky
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Publication number: 20170285094Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: ApplicationFiled: June 22, 2017Publication date: October 5, 2017Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Patent number: 9739824Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: GrantFiled: May 16, 2016Date of Patent: August 22, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Publication number: 20160258994Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: ApplicationFiled: May 16, 2016Publication date: September 8, 2016Inventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Publication number: 20160258998Abstract: A system for electromigration testing is disclosed. The system includes a conductive member, a cap layer of insulative material over at least a portion of a top surface of the conductive member, a cathode conductively connected to a first end of the conductive member; an anode conductively connected to a second end of the conductive member, and a current source conductively connected to the cathode and the anode. A plurality of sensory pins are disposed along a length of the conductive member between the first end and the second end of the conductive member. The sensory pins are conductively connected to a bottom surface of the conductive member. At least one measurement device is conductively connected to at least one sensory pin of the plurality of sensory pins. The at least one measurement device determines a resistance of at least one portion of the conductive member.Type: ApplicationFiled: March 2, 2015Publication date: September 8, 2016Inventors: Fen Chen, Cathryn J. Christiansen, Deborah M. Massey, Prakash Periasamy, Michael A. Shinosky
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Patent number: 9395403Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: GrantFiled: October 28, 2013Date of Patent: July 19, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Publication number: 20150115994Abstract: A per-chip equivalent oxide thickness (EOT) circuit sensor resides in an integrated circuit. The per-chip EOT circuit sensor determines electrical characteristics of the integrated circuit. The measured electrical characteristics include leakage current. The determined electrical characteristics are used to determine physical attributes of the integrated circuit. The physical attributes, including EOT, are used in a reliability model to predict per-chip failure rate.Type: ApplicationFiled: October 28, 2013Publication date: April 30, 2015Applicant: International Business Machines CorporationInventors: Carole D. Graas, Nazmul Habib, Deborah M. Massey, John G. Massey, Pascal A. Nsame, Ernest Y. Wu, Emmanuel Yashchin
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Patent number: 8765568Abstract: A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.Type: GrantFiled: October 8, 2013Date of Patent: July 1, 2014Assignee: International Business Machines CorporationInventors: Joseph M. Lukaitis, Deborah M. Massey, Timothy D. Sullivan, Ping-Chuan Wang, Kimball M. Watson
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Publication number: 20140038381Abstract: A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.Type: ApplicationFiled: October 8, 2013Publication date: February 6, 2014Applicant: International Business Machines CorporationInventors: Joseph M. Lukaitis, Deborah M. Massey, Timothy D. Sullivan, Ping-Chuan Wang, Kimball M. Watson
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Patent number: 8592947Abstract: A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.Type: GrantFiled: December 8, 2010Date of Patent: November 26, 2013Assignee: International Business Machines CorporationInventors: Joseph M. Lukaitis, Deborah M. Massey, Timothy D. Sullivan, Ping-Chuan Wang, Kimball M. Watson
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Publication number: 20120259575Abstract: Disclosed is an integrated circuit chip incorporating a test circuit having multiple logic blocks. Each logic block is a matrix of individually selectable, physically different, test devices in a specific class of devices. An embedded processor ensures that specific stress conditions are selectively applied to the test devices and further controls selective testing, by a sensor system, of the test devices to determine the impact of the applied stress conditions. In a laboratory or test system environment, accelerated stress conditions are selectively applied to the test devices and the testing results are used to model device performance degradation due to class-specific failure mechanisms. In the field, stress conditions are selectively applied to test devices so as to mimic stress conditions impacting active devices in use on the same chip and the testing results are used to indirectly monitor performance degradation of the active devices due to class-specific failure mechanisms.Type: ApplicationFiled: April 7, 2011Publication date: October 11, 2012Applicant: International Business Machines CorporationInventors: Carole D. Graas, Deborah M. Massey, John Greg Massey, Pascal A. Nsame
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Patent number: 8217671Abstract: A parallel array architecture for constant current electro-migration stress testing is provided. The parallel array architecture comprises a device under test (DUT) array having a plurality of DUTs coupled in parallel and a plurality of localized heating elements associated with respective ones of the DUTs in the DUT array. The architecture further comprises DUT selection logic that isolates individual DUTs within the array. Moreover, the architecture comprises current source logic that provides a reference current and controls the current through the DUTs in the DUT array such that each DUT in the DUT array has substantially a same current density, and current source enable logic for selectively enabling portions for the current source logic. Electro-migration stress testing is performed on the DUTs of the DUT array using the heating elements, the DUT selection logic, current source logic, and current source enable logic.Type: GrantFiled: June 26, 2009Date of Patent: July 10, 2012Assignee: International Business Machines CorporationInventors: Kanak B. Agarwal, Peter A. Habitz, Jerry D. Hayes, Ying Liu, Deborah M. Massey, Alvin W. Strong
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Publication number: 20120146186Abstract: A structure and method of fabricating the structure includes a semiconductor substrate having a top surface defining a horizontal direction and a plurality of interconnect levels stacked from a lowermost level proximate the top surface of the semiconductor substrate to an uppermost level furthest from the top surface. Each of the interconnect levels include vertical metal conductors physically connected to one another in a vertical direction perpendicular to the horizontal direction. The vertical conductors in the lowermost level being physically connected to the top surface of the substrate, and the vertical conductors forming a heat sink connected to the semiconductor substrate. A resistor is included in a layer immediately above the uppermost level. The vertical conductors being aligned under a downward vertical resistor footprint of the resistor, and each interconnect level further include horizontal metal conductors positioned in the horizontal direction and being connected to the vertical conductors.Type: ApplicationFiled: December 8, 2010Publication date: June 14, 2012Applicant: International Business Machines CorporationInventors: Joseph M. Lukaitis, Deborah M. Massey, Timothy D. Sullivan, Ping-Chuan Wang, Kimball M. Watson