Patents by Inventor Declan Doherty

Declan Doherty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11831663
    Abstract: Methods and apparatus for secure networking protocol optimization via NIC hardware offloading. Under a method, security offload entries are cached in a flow table or a security database offload table on a network interface coupled to a host that implements a host security database mapping flows to Security Association (SA) contexts. Each security offload entry includes information identify a flow and information, such as an offset value, to locate a corresponding entry for the flow in the host security database. Hardware descriptors for received packets that belong to flows with matching security offload entries are generated and marked with the information used to locate the corresponding entries in the host security database. The hardware descriptors are processed by software on the host and the location information is used to de-reference the location of applicable entries in the host security database.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: November 28, 2023
    Assignee: Intel Corporation
    Inventors: Mesut Ergin, Ping Yu, Declan Doherty, Yuwei Zhang
  • Patent number: 11734202
    Abstract: A system including a sensor interface for determining a substitute frequency value via a sensor interface is provided. The system can include a first circuit receiving a frequency signal. The system can also include a sensor interface coupled to the first circuit and configured to determine a substitute frequency value based on the frequency signal. The system can also include a second circuit providing the substitute frequency value output from the sensor interface. The second circuit can provide the substitute frequency value in place of an analog input value by mimicking the behavior of an analog-to-digital converter. An apparatus including the sensor interface and methods of determining the substitute frequency value using a sensor interface are also provided.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: August 22, 2023
    Assignee: Baker Hughes Oilfield Operations LLC
    Inventors: Andrew Walter Hutchinson, Declan Doherty
  • Publication number: 20230198912
    Abstract: Methods and apparatus to assign and check anti-replay sequence numbers. In one embodiment, a method includes assigning, by circuitry, sequence numbers to packets of traffic flows, wherein a first sequence number is assigned to a first packet based on a determination that the first packet is within a first traffic flow mapped to a first secure channel, and wherein the first sequence number is within a set of sequence numbers allocated to the first secure channel and maintained by the circuitry. The method continues with allocating the packets of traffic flows to be processed among a plurality of processor cores and processing the packets of traffic flows by the plurality of processor cores.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Inventors: Niall MCDONNELL, Pravin PATHAK, Rahul SHAH, Declan DOHERTY
  • Publication number: 20220368348
    Abstract: An accelerator device determines a compression format based on a header of a structured data element to be decompressed. The accelerator device may configure the accelerator device based on the compression format. The accelerator device may decompress a data block of the structured data element based on the configuration.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Applicant: INTEL CORPORATION
    Inventors: Laurent Coquerel, Fei Wang, John Browne, Smita Kumar, Declan Doherty, Marlow Weston, Reshma Pattan
  • Patent number: 11431565
    Abstract: Examples include techniques for monitoring a data packet transfer rate at an interface queue, and based at least in part on a comparison of the data packet transfer rate to a threshold, assigning the interface queue from a core of a first class to a core of a second class or assigning the interface queue from a core of the second class to a core of the first class.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: August 30, 2022
    Assignee: Intel Corporation
    Inventors: Mohammad Abdul Awal, Jasvinder Singh, Reshma Pattan, David Hunt, Declan Doherty, Chris Macnamara
  • Publication number: 20220083477
    Abstract: A system including a sensor interface for determining a substitute frequency value via a sensor interface is provided. The system can include a first circuit receiving a frequency signal. The system can also include a sensor interface coupled to the first circuit and configured to determine a substitute frequency value based on the frequency signal. The system can also include a second circuit providing the substitute frequency value output from the sensor interface. The second circuit can provide the substitute frequency value in place of an analog input value by mimicking the behavior of an analog-to-digital converter. An apparatus including the sensor interface and methods of determining the substitute frequency value using a sensor interface are also provided.
    Type: Application
    Filed: August 19, 2021
    Publication date: March 17, 2022
    Inventors: Andrew Walter Hutchinson, Declan Doherty
  • Publication number: 20210014324
    Abstract: Examples described herein relate to a network interface apparatus that includes an interface; circuitry to determine whether to store content of a received packet into a cache or into a memory, at least during a configuration of the network interface to store content directly into the cache, based at least in part on a fill level of a region of the cache allocated to receive copies of packet content directly from the network interface; and circuitry to store content of the received packet into the cache or the memory based on the determination, wherein the cache is external to the network interface. In some examples, the network interface is to determine to store content of the received packet into the memory based at least in part on a fill level of the region of the cache being identified as full or determine to store content of the received packet into the cache based at least in part on a fill level of the region of the cache being identified as not filled.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Inventors: Andrey CHILIKIN, Tomasz KANTECKI, Chris MACNAMARA, John J. BROWNE, Declan DOHERTY, Niall POWER
  • Publication number: 20200059485
    Abstract: Methods and apparatus for secure networking protocol optimization via NIC hardware offloading. Under a method, security offload entries are cached in a flow table or a security database offload table on a network interface coupled to a host that implements a host security database mapping flows to Security Association (SA) contexts. Each security offload entry includes information identify a flow and information, such as an offset value, to locate a corresponding entry for the flow in the host security database. Hardware descriptors for received packets that belong to flows with matching security offload entries are generated and marked with the information used to locate the corresponding entries in the host security database. The hardware descriptors are processed by software on the host and the location information is used to de-reference the location of applicable entries in the host security database.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 20, 2020
    Inventors: Mesut Ergin, Ping Yu, Declan Doherty, Yuwei Zhang
  • Publication number: 20190052530
    Abstract: Examples include techniques for monitoring a data packet transfer rate at an interface queue, and based at least in part on a comparison of the data packet transfer rate to a threshold, assigning the interface queue from a core of a first class to a core of a second class or assigning the interface queue from a core of the second class to a core of the first class.
    Type: Application
    Filed: October 15, 2018
    Publication date: February 14, 2019
    Inventors: Mohammad Abdul AWAL, Jasvinder SINGH, Reshma PATTAN, David HUNT, Declan DOHERTY, Chris MACNAMARA
  • Patent number: 8846868
    Abstract: Described are cross-specific antibody molecules with binding specificity for both AREG and HBEGF. The antibody molecules may be used in methods of treatment of cancer and diseases associated with angiogenesis.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: September 30, 2014
    Assignee: Fusion Antibodies Limited
    Inventors: Jill Caswell, Shane Olwill, James Johnston, Richard Buick, Thomas Jaquin, Declan Doherty, Christopher Scott
  • Publication number: 20110150886
    Abstract: Described are cross-specific antibody molecules with binding specificity for both AREG and HBEGF. The antibody molecules may be used in methods of treatment of cancer and diseases associated with angiogenesis.
    Type: Application
    Filed: April 17, 2009
    Publication date: June 23, 2011
    Applicant: FUSION ANTIBODIES LIMITED
    Inventors: Jill Caswell, Shane Olwill, James Johnston, Richard Buick, Thomas Jaquin, Declan Doherty, Christopher Scott