Patents by Inventor Deepa Devendran

Deepa Devendran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260352156
    Abstract: A current sense amplifier includes a current sense amplifier core structure including a pair of power field effect transistors (FETs), a start-up circuit including a start-up switch coupled with a FET, and a pulse generation circuit configured to switch on the start-up circuit for a predefined time duration. The FET is grounded and coupled with the pair of power FETs via the start-up switch. The start-up circuit is configured to change a zero-current state of the current sense amplifier core structure to an active state.
    Type: Application
    Filed: October 28, 2025
    Publication date: November 5, 2026
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Saumen MONDAL, Deepa DEVENDRAN
  • Publication number: 20260329320
    Abstract: A device comprises a first intermediate LDO regulator configured to generate a first enhanced reference voltage, a resistor-capacitor (RC) circuit connected to the first intermediate LDO regulator, the RC circuit comprising an RC filter configured to generate a filtered reference voltage based on the first enhanced reference voltage; a second intermediate LDO regulator connected in parallel to the first intermediate LDO regulator and the RC circuit; the second intermediate LDO regulator generates a second replica enhanced reference voltage based on the input reference voltage; a low noise buffer selectively receiving one of the filtered reference voltage or the second replica enhanced reference voltage to generate a buffer reference voltage. These are configured to be transmitted to the high voltage LDO regulator based on an operational state of the RC filter. The high voltage LDO regulator is configured to generate the output based on the buffered reference voltage.
    Type: Application
    Filed: November 6, 2025
    Publication date: October 22, 2026
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Zaira ZAHIR, Deepa DEVENDRAN
  • Publication number: 20260288184
    Abstract: A Low Dropout (LDO) regulator device is provided. The LDO regulator device includes an amplifier that provides at least one of a linear output voltage and a feedback voltage, the linear output voltage indicating an error signal from a reference voltage, a current mirror-based level shifter coupled with the amplifier, the current mirror-based level shifter configured to provide a stable reference current based on at least one of the linear output voltage and the feedback voltage, and a power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) module including a first N-channel MOSFET (NMOS) transistor configured to provide a sourcing power supply to a load and a second NMOS transistor configured to provide a sinking power supply to the load. The first NMOS transistor is coupled to the amplifier via the current mirror-based level shifter, and the second NMOS transistor is coupled to the amplifier.
    Type: Application
    Filed: February 26, 2026
    Publication date: September 24, 2026
    Inventors: Anirban Barman, Deepa Devendran