Patents by Inventor Deepa Ratakonda

Deepa Ratakonda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9331137
    Abstract: An integrated circuit may include interconnects formed from alternating metal interconnect layers and inter-metal dielectric layers. A metal-insulator-metal capacitor may be formed within a selected inter-metal dielectric layer. The metal-insulator-metal capacitor may include first and second capacitor electrodes. The first capacitor electrode may contact a first conductive interconnect line in an underlying metal interconnect layer. The second capacitor electrode may overlap the first capacitor electrode and a portion of a second conductive interconnect line in the underlying metal layer. A via may be formed between the underlying metal interconnect layer and an additional metal interconnect layer. The via may simultaneously contact the second capacitor electrode and the second conductive interconnect line.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: May 3, 2016
    Assignee: Altera Corporation
    Inventors: Deepa Ratakonda, Peter Smeys, Shuxian Chen, Girish Venkitachalam
  • Patent number: 8912104
    Abstract: An integrated circuit may include a substrate in which transistors are formed. The transistors may be associated with blocks of circuitry. Some of the blocks of circuitry may be configured to reduce leakage current. A selected subset of the blocks of circuitry may be selectively heated to reduce the channel length of their transistors through dopant diffusion and thereby strengthen those blocks of circuitry relative to the other blocks of circuitry. Selective heating may be implemented by coating the blocks of circuitry on the integrated circuit with a patterned layer of material such as a patterned anti-reflection coating formed of amorphous carbon or a reflective coating. During application of infrared light, the coated and uncoated areas will rise to different temperatures, selectively strengthening desired blocks of circuitry on the integrated circuit.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: December 16, 2014
    Assignee: Altera Corporation
    Inventors: Deepa Ratakonda, Christopher J. Pass, Che Ta Hsu, Fangyun Richter, Wilson Wong
  • Patent number: 6849544
    Abstract: A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer including metal silicide or metal silicide nitride. A top conductive layer is formed over the barrier layer. The top conductive layer can include metal or metal silicide. Selective oxidation can be performed to reduce the amount of oxidation of selected materials in a structure containing multiple layers, such as the multi-layer conductive structure. The selective oxidation is performed in a single-wafer rapid thermal processing system, in which a selected ambient, including hydrogen, is used to ensure low oxidation of a selected material, such as tungsten or a metal nitride.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: February 1, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Yongjun Jeff Hu, Pai Hung Pan, Deepa Ratakonda, James Beck, Randhir P. S. Thakur
  • Publication number: 20030207556
    Abstract: A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer including metal silicide or metal silicide nitride. A top conductive layer is formed over the barrier layer. The top conductive layer can include metal or metal silicide. Selective oxidation can be performed to reduce the amount of oxidation of selected materials in a structure containing multiple layers, such as the multi-layer conductive structure. The selective oxidation is performed in a single-wafer rapid thermal processing system, in which a selected ambient, including hydrogen, is used to ensure low oxidation of a selected material, such as tungsten or a metal nitride.
    Type: Application
    Filed: June 4, 2003
    Publication date: November 6, 2003
    Inventors: Ronald A. Weimer, Yongjun Jeff Hu, Pai Hung Pan, Deepa Ratakonda, James Beck, Randhir P.S. Thakur
  • Patent number: 6596595
    Abstract: A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer including metal silicide or metal silicide nitride. A top conductive layer is formed over the barrier layer. The top conductive layer can include metal or metal silicide. Selective oxidation can be performed to reduce the amount of oxidation of selected materials in a structure containing multiple layers, such as the multi-layer conductive structure. The selective oxidation is performed in a single-wafer rapid thermal processing system, in which a selected ambient, including hydrogen, is used to ensure low oxidation of a selected material, such as tungsten or a metal nitride.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: July 22, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Yongjun Jeff Hu, Pai Hung Pan, Deepa Ratakonda, James Beck, Randhir P. S. Thakur
  • Patent number: 6362086
    Abstract: A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer including metal silicide or metal silicide nitride. A top conductive layer is formed over the barrier layer. The top conductive layer can include metal or metal suicide. Selective oxidation can be performed to reduce the amount of oxidation of selected materials in a structure containing multiple layers, such as the multilayer conductive structure. The selective oxidation is performed in a single-wafer rapid thermal processing system, in which a selected ambient, including hydrogen, is used to ensure low oxidation of a selected material, such as tungsten or a metal nitride.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: March 26, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Yongjun Jeff Hu, Pai Hung Pan, Deepa Ratakonda, James Beck, Randhir P. S. Thakur
  • Patent number: 6291868
    Abstract: A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer including metal silicide or metal silicide nitride. A top conductive layer is formed over the barrier layer. The top conductive layer can include metal or metal silicide. Selective oxidation can be performed to reduce the amount of oxidation of selected materials in a structure containing multiple layers, such as the multi-layer conductive structure. The selective oxidation is performed in a single-wafer rapid thermal processing system, in which a selected ambient, including hydrogen, is used to ensure low oxidation of a selected material, such as tungsten or a metal nitride.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: September 18, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Yongjun Jeff Hu, Pai Hung Pan, Deepa Ratakonda, James Beck, Randhir P. S. Thakur
  • Publication number: 20010014522
    Abstract: A conductive structure for use in a semiconductor device includes a multilayer structure. A first layer includes a material containing silicon, e.g., polysilicon and silicon germanide. A barrier layer is formed over the first layer, with the barrier layer including metal silicide or metal silicide nitride. A top conductive layer is formed over the barrier layer. The top conductive layer can include metal or metal silicide. Selective oxidation can be performed to reduce the amount of oxidation of selected materials in a structure containing multiple layers, such as the multilayer conductive structure. The selective oxidation is performed in a single-wafer rapid thermal processing system, in which a selected ambient, including hydrogen, is used to ensure low oxidation of a selected material, such as tungsten or a metal nitride.
    Type: Application
    Filed: September 15, 1999
    Publication date: August 16, 2001
    Inventors: RONALD A. WEIMER, YONGJUN JEFF HU, PAI HUNG PAN, DEEPA RATAKONDA, JAMES BECK, RANDHIR P.S. THAKUR