Abstract: The invention provides integrated circuit designs that use of an M2 interconnect layer in place of local interconnect conductors for programming in OD area to enable efficient use of OD area for routing the M1 signals in the stack devices. The use of M2 in place of local interconnect conductors for programming also enables the introduction of shields between adjacent M2 programming lines to reduce the capacitive coupling impact. This improves the transistor density and circuit performance significantly. Although the invention is applicable to integrated circuit design in general, it is particularly well suited to 20 nm static random accessory memory (SRAM) chips to produce transistor density circuit performance advantages over prior 20 nm and 28 nm SRAM chip layouts.