Abstract: An audio processing path receives an audio signal from a microphone of an ear-wearable device and reproduces the audio signal at a receiver that is placed within an ear of a user. A deep neural network (DNN) is coupled to the audio processing path that performs speech enhancement on the audio signal. An audio feature detector is operable to detect an audio change via the processing path that triggers a change of state of the DNN. The change of state affects resource consumption by the DNN. The change of state is applied to the DNN, and the DNN performs the speech enhancement in the changed state.

Abstract: A method comprises obtaining ear modeling data, wherein the ear modeling data includes a 3D model of an ear canal; applying a shell generation to generate a shell shape based on the ear modeling data, wherein the shell-generation model is a machine learning model and the shell shape is a 3D representation of a shell of an ear-wearable device; applying a set of one or more component-placement models to determine, based on the ear modeling data, a position and orientation of a component of the ear-wearable device, wherein the component-placement models are independent of the shell-generation model and each of the component-placement models is a separate machine learning model; and generating an ear-wearable device model based on the shell shape and the 3D arrangement of the components of the ear-wearable device.

Abstract: An ear-wearable device stores a plurality of neural network data objects each defining a respective neural network. A sound signal received from a microphone of the ear-wearable device is digitized. An ambient environment of the digitized sound signal is classified into one of a plurality of classifications. Based on the classification, one of the neural network data objects is selected to enhance the digitized sound signal. An analog signal is formed based on the enhanced digitized sound signal. The analog signal is reproduced via a receiver of the ear-wearable device.

Abstract: Hierarchical coarse-grain sparsity for deep neural networks is provided. An algorithm-hardware co-optimized memory compression technique is proposed to compress deep neural networks in a hardware-efficient manner, which is referred to herein as hierarchical coarse-grain sparsity (HCGS). HCGS provides a new long short-term memory (LSTM) training technique which enforces hierarchical structured sparsity by randomly dropping static block-wise connections between layers. HCGS maintains the same hierarchical structured sparsity throughout training and inference; this reduces weight storage for both training and inference hardware systems.

Abstract: Aspects disclosed in the detailed description include memory compression in a deep neural network (DNN). To support a DNN application, a fully connected weight matrix associated with a hidden layer(s) of the DNN is divided into a plurality of weight blocks to generate a weight block matrix with a first number of rows and a second number of columns. A selected number of weight blocks are randomly designated as active weight blocks in each of the first number of rows and updated exclusively during DNN training. The weight block matrix is compressed to generate a sparsified weight block matrix including exclusively active weight blocks. The second number of columns is compressed to reduce memory footprint and computation power, while the first number of rows is retained to maintain accuracy of the DNN, thus providing the DNN in an efficient hardware implementation without sacrificing accuracy of the DNN application.

Abstract: Aspects disclosed in the detailed description include memory compression in a deep neural network (DNN). To support a DNN application, a fully connected weight matrix associated with a hidden layer(s) of the DNN is divided into a plurality of weight blocks to generate a weight block matrix with a first number of rows and a second number of columns. A selected number of weight blocks are randomly designated as active weight blocks in each of the first number of rows and updated exclusively during DNN training. The weight block matrix is compressed to generate a sparsified weight block matrix including exclusively active weight blocks. The second number of columns is compressed to reduce memory footprint and computation power, while the first number of rows is retained to maintain accuracy of the DNN, thus providing the DNN in an efficient hardware implementation without sacrificing accuracy of the DNN application.