Patents by Inventor Deepak Khanchandani

Deepak Khanchandani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Supporting variable line length in digital display timing controllers using data enable signal
    Patent number: 7006115
    Abstract: A digital display unit which receives horizontal lines of unequal length in a V-active region and computes an average length of the lines. The average is used to generate horizontal line demarkers in the V-blank (vertical blank) region. The demarkers specify the transition from one line to the other. Such a feature is useful in spread spectrum clocking (SSC) based display signals in which HSYNC signals may also not be available to determine the transitions from one line to another in the V-blank region.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: February 28, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Jayawardan Janardhanan, Deepak Khanchandani, Ramanujam Thodur Madabusi
  • Supporting variable line length in digital display timing controllers using data enable signal
    Publication number: 20030234774
    Abstract: A digital display unit which receives horizontal lines of unequal length in a V-active region and computes an average length of the lines. The average is used to generate horizontal line demarkers in the V-blank (vertical blank) region. The demarkers specify the transition from one line to the other. Such a feature is useful in spread spectrum clocking (SSC) based display signals in which HSYNC signals may also not be available to determine the transitions from one line to another in the V-blank region.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Applicant: Texas Instruments Incorporated
    Inventors: Jayawardan Janardhanan, Deepak Khanchandani, Ramanujam Thodur Madabusi