Abstract: A method of processing an image in an electronic device. The method may comprise; obtaining a first image; selecting, based on comparing the first image with a plurality of second images, at least one third image from the plurality of second images, wherein the at least one third image is similar to the first image; identifying an identifier of an image group corresponding to the at least one third image; associating the first image with the identifier of the image group; and notifying, on the device, based on the identifier of the image group, existence of the at least one third image.

Abstract: A method of managing applications installed on a computing device and a computing device using the method are provided. The method includes identifying at least one application based on usage data of the computing device, fetching archive data and user data corresponding to the at least one application, creating backup data by correlating the archive data with the user data, and uninstalling the at least one application from the computing device once the creating of the backup data is completed.

Abstract: Aspects of the disclosed technology relate to techniques of bandwidth test in networking system-on-chip design verification. A hardware model of interface circuitry implemented in a reconfigurable hardware modeling device associates dispatch time information with messages when the messages are dispatched by a hardware model of a circuit design implemented in the reconfigurable hardware modeling device. The dispatch time information of a particular message includes information about when, based on a model time reference provided in the reconfigurable hardware modeling device, the particular message is dispatched by the hardware model of the circuit design. The messages and the dispatch time information are sent to a traffic analysis device, which determines bandwidth information of ports of the circuit design based on the dispatch time information.

Abstract: Messages transmitted from an emulator to a testbench of a part of the testbench are recorded from a starting point of an emulation operation to a checkpoint of the emulation operation. State information of the emulator at the checkpoint is captured and stored. The emulator is then configured to a state corresponding to the checkpoint based on the stored state information, and the testbench or the part of the testbench is restored to the checkpoint by running the testbench or the part of the testbench based on the recorded messages.

Abstract: Aspects of the disclosed technology relate to techniques of latency test in networking system-on-chip design verification. A hardware model of interface circuitry implemented in a reconfigurable hardware modeling device associates arrival time information with messages when the messages are delivered to a hardware model of a circuit design implemented in the reconfigurable hardware modeling device, and associates latency information with the messages when the messages are dispatched by the hardware model of the circuit design. The arrival time information of a particular message and the latency information are determined with respect to a model time reference provided in the reconfigurable hardware modeling device.

Abstract: A system for verifying networking system-on-chip designs comprises a reconfigurable hardware modeling device programmed to implement circuitry hardware models and a traffic generation device communicating with the reconfigurable hardware modeling device. The circuitry hardware models comprise a hardware model of a circuit design and a hardware model of interface circuitry. The system employs a backpressure flow control independent of the communication protocol, which can cause the traffic generation device to suspend sending messages when one or more message buffers in the traffic generation device, the reconfigurable hardware modeling device, or both cannot accept more messages based on predetermined conditions.

Abstract: This application discloses a computing system having a virtual machine and a host program that communicate via a virtual interface. The virtual machine can generate a data packet for transmission to the host program via the virtual interface. The virtual machine can receive a saturation signal generated by a virtual interface driver in the virtual interface. The virtual interface driver can be configured to populate a virtual buffer in the virtual interface with the data packet. The virtual machine can determine an availability of resources in the virtual buffer to store the data packet based, at least in part, on the saturation signal, and selectively stall transmission of the data packet to the host program based, at least in part, on the saturation signal. The host program can bypass a hypervisor in the computing system to directly access the virtual buffer in the virtual interface.

Abstract: Traffic-shaping information is associated with ingress transaction-level messages by a traffic generation device. The ingress transaction-level messages and the traffic-shaping information are then sent to a reconfigurable hardware modeling device. The ingress transaction-level messages are converted to ingress signal-level messages by a hardware model of interface circuitry implemented in the reconfigurable hardware modeling device. Based on the traffic-shaping information, the ingress signal-level messages are delivered to a hardware model of a circuit design implemented in the reconfigurable hardware modeling device.

Abstract: A method of processing an image in an electronic device. The method may comprise; obtaining a first image; selecting, based on comparing the first image with a plurality of second images, at least one third image from the plurality of second images, wherein the at least one third image is similar to the first image; identifying an identifier of an image group corresponding to the at least one third image; associating the first image with the identifier of the image group; and notifying, on the device, based on the identifier of the image group, existence of the at least one third image.

Abstract: A method of managing applications installed on a computing device and a computing device using the method are provided. The method includes identifying at least one application based on usage data of the computing device, fetching archive data and user data corresponding to the at least one application, creating backup data by correlating the archive data with the user data, and uninstalling the at least one application from the computing device once the creating of the backup data is completed.

Abstract: A system for verifying networking system-on-chip designs comprises a reconfigurable hardware modeling device programmed to implement circuitry hardware models and a traffic generation device communicating with the reconfigurable hardware modeling device. The circuitry hardware models comprise a hardware model of a circuit design and a hardware model of interface circuitry. The system employs a backpressure flow control independent of the communication protocol, which can cause the traffic generation device to suspend sending messages when one or more message buffers in the traffic generation device, the reconfigurable hardware modeling device, or both cannot accept more messages based on predetermined conditions.

Abstract: Aspects of the disclosed technology relate to techniques of bandwidth test in networking system-on-chip design verification. A hardware model of interface circuitry implemented in a reconfigurable hardware modeling device associates dispatch time information with messages when the messages are dispatched by a hardware model of a circuit design implemented in the reconfigurable hardware modeling device. The dispatch time information of a particular message includes information about when, based on a model time reference provided in the reconfigurable hardware modeling device, the particular message is dispatched by the hardware model of the circuit design. The messages and the dispatch time information are sent to a traffic analysis device, which determines bandwidth information of ports of the circuit design based on the dispatch time information.

Abstract: Traffic-shaping information is associated with ingress transaction-level messages by a traffic generation device. The ingress transaction-level messages and the traffic-shaping information are then sent to a reconfigurable hardware modeling device. The ingress transaction-level messages are converted to ingress signal-level messages by a hardware model of interface circuitry implemented in the reconfigurable hardware modeling device. Based on the traffic-shaping information, the ingress signal-level messages are delivered to a hardware model of a circuit design implemented in the reconfigurable hardware modeling device.

Abstract: This application discloses a computing system having a virtual machine and a host program that communicate via a virtual interface. The virtual machine can generate a data packet for transmission to the host program via the virtual interface. The virtual machine can receive a saturation signal generated by a virtual interface driver in the virtual interface. The virtual interface driver can be configured to populate a virtual buffer in the virtual interface with the data packet. The virtual machine can determine an availability of resources in the virtual buffer to store the data packet based, at least in part, on the saturation signal, and selectively stall transmission of the data packet to the host program based, at least in part, on the saturation signal. The host program can bypass a hypervisor in the computing system to directly access the virtual buffer in the virtual interface.

Abstract: Aspects of the disclosed technology relate to techniques of latency test in networking system-on-chip design verification. A hardware model of interface circuitry implemented in a reconfigurable hardware modeling device associates arrival time information with messages when the messages are delivered to a hardware model of a circuit design implemented in the reconfigurable hardware modeling device, and associates latency information with the messages when the messages are dispatched by the hardware model of the circuit design. The arrival time information of a particular message and the latency information are determined with respect to a model time reference provided in the reconfigurable hardware modeling device.

Abstract: This invention, in general, relates to the field of telecommunications. More particularly, the present invention relates to a centralized system and method for providing customized applications for mobile networks enhanced logic CAMEL roaming services to a mobile subscriber. The CAMEL HUB configured to process a request from the mobile subscriber to avail one or more mobile services from a visited network operator. The mobile subscriber device has a subscription to a home network operator and operates in a home CAMEL phase. The visited network operator operates in a visited CAMEL phase. The CAMEL HUB is also configured to allow the mobile subscriber device to avail the one or more mobile services seamlessly from the visited network operator independent of the visited CAMEL phase. The home CAMEL phase may or may not be different from the visited CAMEL phase.

Abstract: This invention, in general, relates to the field of telecommunications. More particularly, the present invention relates to a centralized system and method for providing customized applications for mobile networks enhanced logic CAMEL roaming services to a mobile subscriber. The CAMEL HUB configured to process a request from the mobile subscriber to avail one or more mobile services from a visited network operator. The mobile subscriber device has a subscription to a home network operator and operates in a home CAMEL phase. The visited network operator operates in a visited CAMEL phase. The CAMEL HUB is also configured to allow the mobile subscriber device to avail the one or more mobile services seamlessly from the visited network operator independent of the visited CAMEL phase. The home CAMEL phase may or may not be different from the visited CAMEL phase.