Patents by Inventor Deepak Kumar Meher

Deepak Kumar Meher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936395
    Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: March 19, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
  • Publication number: 20230238973
    Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
  • Publication number: 20230238972
    Abstract: In described examples, a digital-to-analog converter includes an output, multiple most significant bit (MSB) connector resistors each having a resistance R??R, multiple least significant bit (LSB) connector resistors each having a resistance R, and multiple binary arm resistors each having a resistance 2R. The MSB connector resistors are coupled in a series beginning with the output and ending with a first one of the LSB connector resistors, and the LSB connector resistors are coupled in a series beginning with the first LSB connector resistor. A terminal of one of the binary arm resistors is coupled to an ending of the LSB connector resistor series, and a terminal of each of different remaining ones of the binary arm resistors is coupled between a different pair of the MSB and/or LSB connector resistors.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
  • Patent number: 8981750
    Abstract: An active voltage regulator circuit having improved wake-up response is presented. The circuit includes an op-amp whose output is connected to a pass device for supplying the output level, and has both capacitive and resistive parts in its feedback loop. When the regulator is enabled, the capacitive elements are initially connected, followed after a delay by the resistive elements of the feedback loop.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: March 17, 2015
    Assignee: SanDisk Technologies Inc.
    Inventors: Deepak Kumar Meher, Sridhar Yadala, Subodh Taigor
  • Publication number: 20150054480
    Abstract: An active voltage regulator circuit having improved wake-up response is presented. The circuit includes an op-amp whose output is connected to a pass device for supplying the output level, and has both capacitive and resistive parts in its feedback loop. When the regulator is enabled, the capacitive elements are initially connected, followed after a delay by the resistive elements of the feedback loop.
    Type: Application
    Filed: August 21, 2013
    Publication date: February 26, 2015
    Applicant: SanDisk Technologies Inc.
    Inventors: Deepak Kumar Meher, Sridhar Yadala, Subodh Taigor