Patents by Inventor Deepak Limaye

Deepak Limaye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parallel cachelets
    Patent number: 7216201
    Abstract: Parallel cachelets are provided for a level of cache in a microprocessor. The cachelets may be independently addressable. The level of cache may accept multiple load requests in a single cycle and apply each to a respective cachelet. Depending upon the content stored in each cachelet, the cachelet may generate a hit/miss response to the respective load request. Load requests that hit their cachelets may be satisfied therefrom. Load requests that miss their cachelets may be referred to another level of cache.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: May 8, 2007
    Assignee: Intel Corporation
    Inventors: Ryan N. Rakvic, John P. Shen, Deepak Limaye
  • Parallel cachelets
    Publication number: 20060117141
    Abstract: Parallel cachelets are provided for a level of cache in a microprocessor. The cachelets may be independently addressable. The level of cache may accept multiple load requests in a single cycle and apply each to a respective cachelet. Depending upon the content stored in each cachelet, the cachelet may generate a hit/miss response to the respective load request. Load requests that hit their cachelets may be satisfied therefrom. Load requests that miss their cachelets may be referred to another level of cache.
    Type: Application
    Filed: January 9, 2006
    Publication date: June 1, 2006
    Inventors: Ryan Rakvic, John Shen, Deepak Limaye