Patents by Inventor Deepak Mehrotra

Deepak Mehrotra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240084769
    Abstract: A connector block that directs fuel from an outer fuel line to an inner fuel line. The connector block includes an inlet that couples to the outer fuel line, an outlet that coupled to the inner fuel line, and a fuel accumulator fluidly coupled to the inlet and the outlet. The fuel accumulator directs the fuel from the inlet to the outlet.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: CUMMINS INC.
    Inventors: Kieran J. Richards, Brandon Glover, Vincent Denoyelle, Jacques L. Vincent, Raghuvaran Arumugam, Satya Dinakar Vyseetty, Joseph A. Worthington, Abhishek Mehrotra, Deepak Pillai, Todd S. Manley
  • Publication number: 20210201688
    Abstract: A system may include one or more server hardware computing devices or client hardware computing devices, communicatively coupled to a network, and each comprising at least one processor executing specific computer-executable instructions within a memory. The instructions, when executed, may cause the system to: receive, with a client device, answers to a question from polling hardware possessed by students, store the answers in a non-volatile memory, analyze the answers to assess whether the individual answers are correct or incorrect and to identify one or more misconceptions associated with the incorrect answers, generate assessment data based on the analysis, determine changes that should be made to a lesson plan based on the assessment data, provide a client device with a prompt to make the determined changes to the lesson plan, and display one or more graphical representations of the assessment data on a display of the client device.
    Type: Application
    Filed: April 19, 2018
    Publication date: July 1, 2021
    Inventors: Varsha Agarwal, Deepak Mehrotra, Parimal Pereira, Gopinath Rangaswamy, Ujjwal Singh
  • Publication number: 20200043574
    Abstract: Verification systems for testing food products or other samples may include a mobile analytical device, a mobile accessory device such as a smart phone, and a remote, e.g., cloud-based, computing system. The mobile analytical device is adapted to generate a sensor output that is indicative of a molecular composition of the sample. The mobile accessory device may be adapted to receive the sensor output from the mobile analytical device. The remote computing system may be adapted to analyze analytical data using artificial intelligence (AI) and/or machine learning (M-L) to make an authentication determination of the sensor output relative to a predefined product database. The mobile accessory device may be adapted to upload the sensor output to the remote computing system by a communication network, and the remote computing system may be adapted to download the authentication determination to the mobile accessory device by the same communication network.
    Type: Application
    Filed: September 25, 2019
    Publication date: February 6, 2020
    Applicant: Oak Analytics Inc.
    Inventors: Deepak Mehrotra, Steve K. Chen
  • Publication number: 20190293564
    Abstract: Verification systems for testing food products or other samples include a mobile analytical device, a mobile accessory device such as a smart phone, and a remote, e.g., cloud-based, computing system. The mobile analytical device is adapted to generate a sensor output that is characteristic of the sample. The mobile accessory device may be adapted to receive the sensor output from the mobile analytical device. The remote computing system may be adapted to analyze analytical data using artificial intelligence (AI) and/or machine learning (M-L) to make an authentication determination of the sensor output relative to a. predefined product database. The mobile accessory device may be adapted to upload the sensor output to the remote computing system by a communication network, and the remote computing system may be adapted to download the authentication determination to the mobile accessory device by the communication network.
    Type: Application
    Filed: March 22, 2019
    Publication date: September 26, 2019
    Applicant: Oak Analytics Inc.
    Inventors: Deepak Mehrotra, Steve K. Chen
  • Publication number: 20070028383
    Abstract: A reversible bedding article such as a top sheet, a fitted sheet, or a pillowcase, comprises at least one single layer fabric sheet having a first face, a second face opposite the first face, a main piece, and one or more edge pieces, wherein a first design motif is applied to the first face and a second design motif is applied to the second face, and each face has a finished surface. The main piece and one or more edge pieces are joined by at least one seam to produce a bedding article presenting a finished appearance on either face of the article.
    Type: Application
    Filed: August 2, 2006
    Publication date: February 8, 2007
    Inventor: Deepak Mehrotra
  • Patent number: 6232841
    Abstract: Power amplifiers having reactive networks (such as classes C, C-E, E and F) employ tunable reactive devices in their reactive networks, with the reactive devices respective reactance values capable of being adjusted by means of respective control signals. The tunable reactive devices are made from micro-electromechanical (MEM) devices capable of being integrated with the control circuitry needed to produce the control signals and other amplifier components on a common substrate. The reactive components have high Q values across their adjustment range, enabling the amplifier to produce an output with a low harmonic content over a wide range of input signal frequencies, and a frequency agile, high quality output. The invention can be realized on a number of foundry technologies.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: May 15, 2001
    Assignee: Rockwell Science Center, LLC
    Inventors: James L. Bartlett, Mau Chung F. Chang, Henry O. Marcy, 5th, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao, Deepak Mehrotra, J. L. Julian Tham
  • Patent number: 6232847
    Abstract: A high-Q precision integrated reversibly trimmable singleband oscillator and tunable multiband oscillator are presented that overcome the problems laser trimming and solid state switches. This is accomplished using micro-electromechanical system (MEMS) technology to integrate an amplifier and its tunable LC network on a common substrate. The LC network can be configured to provide a very narrow bandwidth frequency response which peaks at one or more very specific predetermined frequencies without de-Qing the oscillator.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: May 15, 2001
    Assignee: Rockwell Science Center, LLC
    Inventors: Henry O. Marcy, 5th, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao, James L. Bartlett, Mau Chung F. Chang, Deepak Mehrotra, J. L. Julian Tham
  • Patent number: 6094102
    Abstract: A frequency stabilizer circuit in the form of a charge-pump phase-lock loop utilizing a MEMS capacitance device, preferably a tunable MEMS capacitor or a MEMS capacitor bank, which more rapid and with a greater precision determine the phase and frequency of a carrier signal so that it can be extracted, providing an information signal of interest. Such MEMS devices have the added advantage of providing linear capacitance, low insertion losses, higher isolation and high reliability, they run on low power and permit the entire circuit to be fabricated on a common substrate. The use of the MEMS capacitance device reduces unwanted harmonics generated by the circuit's charge pump allowing the filtering requirements to be relaxed or perhaps eliminated.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: July 25, 2000
    Assignee: Rockwell Science Center, LLC
    Inventors: Mau Chung F. Chang, Henry O. Marcy, 5th, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao, James L. Bartlett, J. L. Julian Tham, Deepak Mehrotra
  • Patent number: 6049702
    Abstract: The passive components of a transceiver, such as transmit/receive switches, antennas, inductors, capacitors and resonators, are integrated together on a common substrate to form an integrated passive transceiver section, which, in combination with other components, provides a highly reliable, low-cost, high-performance transceiver. Micro-electromechanical (MEM) device fabrication techniques are used to provide low-loss, high-performance switches and low-loss, high-Q reactive components, and enable the passive transceiver section's high level of integration. The passive components are preferably integrated on a low-cost glass substrate, with transceiver circuits containing active components fabricated on a separate substrate; the separate substrates are interconnected to implement the RF/analog and analog/digital interface portions of a transceiver. Additional MEM switching devices permit multiple, parallel signal paths to be switched in and out of the transceiver circuitry as needed to optimize performance.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: April 11, 2000
    Assignee: Rockwell Science Center, LLC
    Inventors: J. L. Julian Tham, Deepak Mehrotra, James L. Bartlett, Mau Chung F. Chang, Henry O. Marcy, 5th, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao
  • Patent number: 5959516
    Abstract: A high Q MEMS capacitor that can be continuously tuned with a large tuning ratio or reversibly trimmed using an electrostatic force. The tunable capacitor has a master/slave structure in which a control voltage is applied to the master (control) capacitor to set the capacitance of the slave (signal) capacitor to which an RF signal is applied via a suspended mechanical coupler. The master-slave structure reduces tuning error by reducing the signal capacitor's surface area and increasing its spring constant, and may eliminate the need for discrete blocking inductors by electrically isolating the control and signal capacitors. The trimmable capacitor provides an electrostatic actuator that selectively engages a stopper with teeth on a tunable capacitor structure to fix the trimmed capacitance.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: September 28, 1999
    Assignee: Rockwell Science Center, LLC
    Inventors: Mau Chung F. Chang, Henry O. Marcy, 5.sup.th, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao, Sangtae Park, J. L. Julian Tham, Deepak Mehrotra, James L. Bartlett
  • Patent number: 5880921
    Abstract: A monolithically integrated switched capacitor bank using MEMS technology that is capable of handling GHz signal frequencies in both the RF and millimeter bands while maintaining precise digital selection of capacitor levels over a wide tuning range. Each MEMS switch includes a cantilever arm that is affixed to the substrate and extends over a ground line and a gapped signal line. An electrical contact is formed on the bottom of the cantilever arm positioned above and facing the gap in the signal line. A top electrode atop the cantilever arm forms a control capacitor structure above the ground line. A capacitor structure, preferably a MEMS capacitor suspended above the substrate at approximately the same height as the cantilever arm, is anchored to the substrate and connected in series with a MEMS switch.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: March 9, 1999
    Assignee: Rockwell Science Center, LLC
    Inventors: J.L. Julian Tham, James L. Bartlett, Mau Chung F. Chang, Henry O. Marcy, 5th, Deepak Mehrotra, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao
  • Patent number: 5872489
    Abstract: An integrated, tunable inductance network features a number of fixed inductors fabricated on a common substrate along with a switching network made up of a number of micro-electromechanical (MEM) switches. The switches selectably interconnect the inductors to form an inductance network having a particular inductance value, which can be set with a high degree of precision when the inductors are configured appropriately. The preferred MEM switches introduce a very small amount of resistance, and the inductance network can thus have a high Q. The MEM switches and inductors can be integrated using common processing steps, reducing parasitic capacitance problems associated with wire bonds and prior art switches, increasing reliability, and reducing the space, weight and power requirements of prior art designs.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: February 16, 1999
    Assignee: Rockwell Science Center, LLC
    Inventors: Mau Chung F. Chang, Henry O. Marcy, 5th, Deepak Mehrotra, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, Jun J. Yao, James L. Bartlett, J. L. Julian Tham
  • Patent number: 5834975
    Abstract: An integrated, variable gain microwave frequency power amplifier comprises a number of individual amplifier stages which contain microwave frequency active devices. Each stage is fed with a common input signal, and the individual stage outputs are connected to respective micro-electromechanical (MEM) switches which, when closed, connect the individual outputs together to form the power amplifier's output. The power amplifier's gain is determined by the number of outputs connected together. The preferred switch provides low insertion loss and excellent electrical isolation, enabling a number of amplifier stages to be efficiently interconnected to provide a wide dynamic range power amplifier. The switches are preferably integrated on a common substrate with the active devices, eliminating the need for wire bonds and reducing parasitic capacitances.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: November 10, 1998
    Assignee: Rockwell Science Center, LLC
    Inventors: James L. Bartlett, Mau Chung F. Chang, J. Aiden Higgins, Henry O. Marcy, 5th, Deepak Mehrotra, Kenneth D. Pedrotti, David R. Pehlke, Charles W. Seabury, J. L. Julian Tham, Jun J. Yao
  • Patent number: 4527115
    Abstract: A configurable logic gate array having an array of logic gates adapted for selective electrical interconnection to provide a predetermined logic function on a plurality of input logic signals fed to the configured gate array and produce such predetermined logic function as an output signal at an array output terminal. An output buffer circuit is coupled between the output of an interconnected gate and the array output terminal. A parametric testing circuit is responsive to a control signal for electrically coupling, during a normal operating mode, the output of the interconnected gate to the array output terminal, or, during a parameter testing mode, a logic signal source for producing "high" and "low" logic output voltages representative of the logic output voltage produced by the logic gates in response to the logic input signals.
    Type: Grant
    Filed: December 22, 1982
    Date of Patent: July 2, 1985
    Assignee: Raytheon Company
    Inventors: Deepak Mehrotra, Rajni Kant, Kishor M. Patel
  • Patent number: 4512076
    Abstract: A semiconductor device fabrication process is provided wherein a first window is formed in a first silicon dioxide layer which is disposed over the surface of a silicon layer to expose a first portion of the silicon layer. A doped region is formed in the first portion of a silicon layer exposed by the first window. A second layer of silicon dioxide is deposited over the surface of the first, previously formed, silicon dioxide layer and over the first portion of the silicon layer exposed by the first window. A second window is formed through the first and second silicon dioxide layers to expose a second, different portion of the surface of the silicon layer. A layer of silicon nitride is disposed over the second layer of silicon dioxide and through the second formed window onto the portion of the silicon layer exposed by such second formed window. The surface of the structure is then masked with windows being formed in such mask over the first and second previously exposed portions of the silicon layer.
    Type: Grant
    Filed: December 20, 1982
    Date of Patent: April 23, 1985
    Assignee: Raytheon Company
    Inventors: Deepak Mehrotra, Gerard J. Shaw, Jok Y. Go, Rajni Kant