Patents by Inventor Deepak Pandey

Deepak Pandey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144210
    Abstract: A method for optimizing invoice payments according to supplier and buyer controls includes: receiving one or more received data message including invoice data, a buyer identification value, a supplier identification value, and a plurality of buyer optimization priorities, wherein the invoice data is associated with an invoice and includes an invoice amount and due date; identifying a plurality of supplier controls associated with the supplier identification value; identifying one or more buyer preferences associated with the buyer identification value; determining an optimal payment schedule for one or more payment transactions for the invoice based on the invoice data, the buyer optimization priorities, the plurality of supplier controls, and the one or more buyer preferences; transmitting a transmitted data message including the determined optimal payment schedule.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Srinivasan CHANDRASEKHARAN, Ganesh Nagendra PRASAD, Ross HARRIS, Alonso ARAUJO, Anubha PANDEY, Deepak BHATT, Aman GUPTA, Tanmoy BHOWMIK
  • Patent number: 11808617
    Abstract: A measurement circuit of a body weight measuring apparatus is provided. The measurement circuit comprises a load sensing unit including at least one wheatstone bridge circuit for generating a load information comprising at least one of: a left-side weight, a right-side weight, an anterior-side weight, and a posterior-side weight in the form of an output voltage, upon application of a load. The load sensing unit is powered by an input excitation voltage across the at least one wheatstone bridge circuit. The measurement circuit includes an amplifier circuit to amplify the output voltage to generate an amplified output, an analog to digital converter circuit for converting the amplified output to a digital representation of the weight of the load, and a microcontroller to receive and transmit the digital representation of the weight of the load to a server for computing an exact weight of the load.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: November 7, 2023
    Inventors: Sukhwant Singh Khanuja, Deepak Pandey, Steven Murakami
  • Publication number: 20230067318
    Abstract: A dual-function supercapacitor carbon fiber composite stores electrical energy and functions, for example, as the body shell of electric vehicles (EVs). This is achieved with a vertically aligned graphene on carbon fiber electrode, upon which metal oxides were deposited to obtain ultra-high energy density anode and cathode. A high-strength multilayer carbon composite assembly is fabricated using an alternate layer patterning configuration of epoxy and polyacrylamide gel electrolyte. The energized composite delivers a high areal energy density of 0.31 mWh cm?2 at 0.3 mm thickness and showed a high tensile strength of 518 MPa, bending strength of 477 MPa, and impact strength 2666 J/m. To show application in EVs, a toy car body fabricated with energized composite operates using the energy stored inside the frame. Moreover, when integrated with a solar cell, this composite powered an IoT (interne of things) device, showing feasibility in communication satellites.
    Type: Application
    Filed: June 16, 2022
    Publication date: March 2, 2023
    Applicant: University of Central Florida Research Foundation, Inc.
    Inventors: Jayan Thomas, Deepak Pandey, Kowsik Sambath Kumar
  • Publication number: 20220307893
    Abstract: A measurement circuit of a body weight measuring apparatus is provided. The measurement circuit comprises a load sensing unit including at least one wheatstone bridge circuit for generating a load information comprising at least one of: a left-side weight, a right-side weight, an anterior-side weight, and a posterior-side weight in the form of an output voltage, upon application of a load. The load sensing unit is powered by an input excitation voltage across the at least one wheatstone bridge circuit. The measurement circuit includes an amplifier circuit to amplify the output voltage to generate an amplified output, an analog to digital converter circuit for converting the amplified output to a digital representation of the weight of the load, and a microcontroller to receive and transmit the digital representation of the weight of the load to a server for computing an exact weight of the load.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 29, 2022
    Inventors: Sukhwant Singh KHANUJA, Deepak PANDEY, Steven MURAKAMI
  • Publication number: 20220139639
    Abstract: Energized composites include vertically aligned graphene on carbon fibers (VGCF). The VGCF enhances surface area available for charge storage, acts as templates for depositing other charge storing materials and provides stability for a minimum of 100,000 discharge cycles. The final storage device is in the order of high strength carbon fiber matrix with active material, glass fiber separator with polymer electrolyte and another carbon fiber matrix with active material. To achieve higher voltage or current, devices can be connected in series or parallel, respectively. The whole structure is made into a structural component by infusing epoxy resin. An alternating pattern of energy storage devices allows for the epoxy resin to seep through the whole structure and strongly bind them to make a monolith multifunctional composite.
    Type: Application
    Filed: November 4, 2021
    Publication date: May 5, 2022
    Applicant: University of Central Florida Research Foundation, Inc.
    Inventors: Jayan Thomas, Deepak Pandey, Kowsik Sambath Kumar
  • Patent number: 10671486
    Abstract: Methods that can optimize data storage via tracking flashcopy use are provided. One method includes storing flashcopies of data to a target volume in which the data is stored on a source volume and each flashcopy represents a particular portion of the data. The method further includes tracking a quantity of input/output (I/O) requests for each respective portion of the data on the target volume represented by a flashcopy and copying a particular portion of the data from the source volume to the target volume in response to receiving a predetermined quantity of I/O requests on the target volume for the particular portion of the data. Systems and apparatus that can include, perform, and/or implement the methods are also provided.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: June 2, 2020
    Assignee: International Business Machines Corporation
    Inventors: Sumit Mehrotra, Sonar Jeetendra Rajendra, Deepak Pandey
  • Publication number: 20200034242
    Abstract: Methods that can optimize data storage via tracking flashcopy use are provided. One method includes storing flashcopies of data to a target volume in which the data is stored on a source volume and each flashcopy represents a particular portion of the data. The method further includes tracking a quantity of input/output (I/O) requests for each respective portion of the data on the target volume represented by a flashcopy and copying a particular portion of the data from the source volume to the target volume in response to receiving a predetermined quantity of I/O requests on the target volume for the particular portion of the data. Systems and apparatus that can include, perform, and/or implement the methods are also provided.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 30, 2020
    Inventors: Sumit Mehrotra, Sonar Jeetendra Rajendra, Deepak Pandey
  • Publication number: 20170006331
    Abstract: A system is disclosed for rendering a split multimedia content stream associated with a single program among networked playback devices in sync with each other. Splitting multimedia content allows, for example, two viewers of the same movie to hear the audio track in different languages, or presentation of related program information on a second screen. A presentation method disclosed ensures that the same program can be played in full or in part on multiple devices while maintaining audio and video synchronization among the devices. In one embodiment, synchronization is achieved by monitoring network latency and client system latency, and then incorporating latency information into a program clock reference (PCR) signal for transmission to a secondary playback device.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Gaurav JAIRATH, Amit-Kumar SRIVASTAVA, Deepak PANDEY
  • Patent number: 9419556
    Abstract: A method and arrangement for operating a pump system are disclosed, the pump system including a pump arranged to be rotated with an AC motor, an inverter, the output of which is electrically connected to the AC motor, and a photovoltaic panel system electrically connected to feed DC power to the inverter. The method can include setting a voltage limit, and determining continuously voltage obtained from the photovoltaic panel system. When the determined voltage of the photovoltaic panel system is below the set voltage limit, frequency of the inverter can be controlled such that the ratio between output voltage of the inverter and the output frequency is substantially constant. When the determined voltage of the photovoltaic panel system exceeds the voltage limit, the inverter frequency can be controlled for keeping voltage of the photovoltaic panel system substantially at the voltage limit.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: August 16, 2016
    Assignee: ABB Technology Oy
    Inventors: Laxmikantha Shenoy, Ahmed Syed, Chetan Patange, Deepak Pandey, Mikko Lammi, Rahul Raj, Satyan Rn
  • Publication number: 20160093709
    Abstract: Some embodiments include transistor-containing constructions having gate material within an opening in a semiconductor material and spaced from the semiconductor material by gate dielectric material. The opening has a wide lower region beneath a narrow upper region. A saddle region of the gate dielectric material extends outwardly from a bottom of the opening and is along the semiconductor material beneath the opening. A saddle region of the gate material extends outwardly from the bottom of the opening and is along the gate dielectric material beneath the opening. Source/drain regions are within the semiconductor material along sides of the gate material. Some embodiments include memory arrays.
    Type: Application
    Filed: December 10, 2015
    Publication date: March 31, 2016
    Inventors: Deepak Pandey, Haitao Liu
  • Patent number: 9240477
    Abstract: Some embodiments include transistor-containing constructions having gate material within an opening in a semiconductor material and spaced from the semiconductor material by gate dielectric material. The opening has a wide lower region beneath a narrow upper region. A saddle region of the gate dielectric material extends outwardly from a bottom of the opening and is along the semiconductor material beneath the opening. A saddle region of the gate material extends outwardly from the bottom of the opening and is along the gate dielectric material beneath the opening. Source/drain regions are within the semiconductor material along sides of the gate material. Some embodiments include memory arrays.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: January 19, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Pandey, Haitao Liu
  • Patent number: 9147729
    Abstract: Some embodiments include methods of forming transistors. Recesses are formed to extend into semiconductor material. The recesses have upper regions lined with liner material and have segments of semiconductor material exposed along lower regions. Semiconductor material is isotropically etched through the exposed segments which transforms the recesses into openings having wide lower regions beneath narrow upper regions. Gate dielectric material is formed along sidewalls of the openings. Gate material is formed within the openings and over regions of the semiconductor material between the openings. Insulative material is formed down the center of each opening and entirely through the gate material. A segment of gate material extends from one of the openings to the other, and wraps around a pillar of the semiconductor material between the openings. The segment is a gate of a transistor. Source/drain regions are formed on opposing sides of the gate.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: September 29, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Deepak Pandey, Haitao Liu, Fawad Ahmed, Kamal M. Karda
  • Publication number: 20150243734
    Abstract: Some embodiments include methods of forming transistors. Recesses are formed to extend into semiconductor material. The recesses have upper regions lined with liner material and have segments of semiconductor material exposed along lower regions. Semiconductor material is isotropically etched through the exposed segments which transforms the recesses into openings having wide lower regions beneath narrow upper regions. Gate dielectric material is formed along sidewalls of the openings. Gate material is formed within the openings and over regions of the semiconductor material between the openings. Insulative material is formed down the center of each opening and entirely through the gate material. A segment of gate material extends from one of the openings to the other, and wraps around a pillar of the semiconductor material between the openings. The segment is a gate of a transistor. Source/drain regions are formed on opposing sides of the gate.
    Type: Application
    Filed: February 25, 2014
    Publication date: August 27, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Deepak Pandey, Haitao Liu, Fawad Ahmed, Kamal M. Karda
  • Publication number: 20150243782
    Abstract: Some embodiments include transistor-containing constructions having gate material within an opening in a semiconductor material and spaced from the semiconductor material by gate dielectric material. The opening has a wide lower region beneath a narrow upper region. A saddle region of the gate dielectric material extends outwardly from a bottom of the opening and is along the semiconductor material beneath the opening. A saddle region of the gate material extends outwardly from the bottom of the opening and is along the gate dielectric material beneath the opening. Source/drain regions are within the semiconductor material along sides of the gate material. Some embodiments include memory arrays.
    Type: Application
    Filed: February 25, 2014
    Publication date: August 27, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Deepak Pandey, Haitao Liu
  • Publication number: 20150093255
    Abstract: A method and arrangement are disclosed for operating a pump in pump system having a photovoltaic panel system, an inverter electrically connected to the photovoltaic panel system, and a motor driving the pump and electrically connected to the output of the inverter. The method can include setting a voltage limit for the inverter, monitoring the voltage produced by the photovoltaic panel system, operating the inverter for rotating of the motor when the voltage produced by the photovoltaic panel system is above the voltage limit, and disabling use of the inverter when the voltage of the photovoltaic system remains below the voltage limit.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Applicant: ABB OY
    Inventors: Ahmed Syed, Chetan Patange, Deepak Pandey, Laxmikantha Shenoy, Mikko Lammi, Rahul Raj, Satyan Rn
  • Publication number: 20150091487
    Abstract: A method and arrangement for operating a pump system are disclosed, the pump system including a pump arranged to be rotated with an AC motor, an inverter, the output of which is electrically connected to the AC motor, and a photovoltaic panel system electrically connected to feed DC power to the inverter. The method can include setting a voltage limit, and determining continuously voltage obtained from the photovoltaic panel system. When the determined voltage of the photovoltaic panel system is below the set voltage limit, frequency of the inverter can be controlled such that the ratio between output voltage of the inverter and the output frequency is substantially constant. When the determined voltage of the photovoltaic panel system exceeds the voltage limit, the inverter frequency can be controlled for keeping voltage of the photovoltaic panel system substantially at the voltage limit.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Applicant: ABB OY
    Inventors: Laxmikantha Shenoy, Ahmed Syed, Chetan Patange, Deepak Pandey, Mikko Lammi, Rahul Raj, Satyan RN