Patents by Inventor Deepak Rameshkumar Tanna

Deepak Rameshkumar Tanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Saving and restoring configuration and status information with reduced latency
    Patent number: 11921564
    Abstract: In one embodiment, an apparatus includes: a port circuit to receive a configuration write from a source circuit; a save restore memory coupled to the port circuit to store information of a plurality of control and status registers (CSRs); and a configuration network coupled to the port circuit, the configuration network coupled to a plurality of nodes, each of the plurality of nodes comprising at least one CSR. The port circuit may be configured to send the configuration write to a first node of the plurality of nodes and to the save restore memory. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Intel Corporation
    Inventor: Deepak Rameshkumar Tanna
  • SAVING AND RESTORING CONFIGURATION AND STATUS INFORMATION WITH REDUCED LATENCY
    Publication number: 20230305619
    Abstract: In one embodiment, an apparatus includes: a port circuit to receive a configuration write from a source circuit; a save restore memory coupled to the port circuit to store information of a plurality of control and status registers (CSRs); and a configuration network coupled to the port circuit, the configuration network coupled to a plurality of nodes, each of the plurality of nodes comprising at least one CSR. The port circuit may be configured to send the configuration write to a first node of the plurality of nodes and to the save restore memory. Other embodiments are described and claimed.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 28, 2023
    Inventor: Deepak Rameshkumar Tanna