Patents by Inventor Deepak Selvanathan

Deepak Selvanathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069447
    Abstract: An apparatus of manufacturing a semiconductor device is provided. The apparatus including a controller configured to: expose a first region of a photoresist layer with a light pattern, expose a second region of the photoresist layer with at least in part the same light pattern, wherein the second region and the first region overlap in an overlap region of the photoresist layer, and wherein light pattern is configured to form, in exposing the first region, a first portion of individual markings in the overlap region of the photoresist layer, and to form, in exposing the second region, a second portion of individual markings in the overlap region of the photoresist layer. By measuring the composite pattern formed in photoresist by overlapping the first exposure with the second exposure, the relative position of the two exposures can be determined and controlled.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Deepak SELVANATHAN, William T. BLANTON, Martin WEISS
  • Publication number: 20240004310
    Abstract: Embodiments disclosed herein include semiconductor die with overlay marks, electronic devices that include semiconductor dies with overlay marks, and methods of measuring overlay. In one embodiment, a semiconductor die includes multiple overlay marks, including a first overlay mark and a second overlay mark. The first overlay mark is at a first position on the semiconductor die and includes a first set of patterns with a first orientation. The second overlay mark is at a second position on the semiconductor die and includes a second set of patterns with a second orientation. The first position of the first mark and the second position of the second mark are non-overlapping. In addition, the first orientation of the patterns in the first mark is substantially orthogonal to the second orientation of the patterns in the second mark.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Intel Corporation
    Inventors: William Blanton, Deepak Selvanathan, Shakul Tandon, Martin N. Weiss