Patents by Inventor Deepak Sood
Deepak Sood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11495570Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: GrantFiled: February 3, 2022Date of Patent: November 8, 2022Assignee: Kulicke and Soffa Industries, Inc.Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Publication number: 20220157771Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: ApplicationFiled: February 3, 2022Publication date: May 19, 2022Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Patent number: 11276666Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: GrantFiled: June 13, 2019Date of Patent: March 15, 2022Assignee: Kulicke and Soffa Industries, Inc.Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Publication number: 20190295983Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: ApplicationFiled: June 13, 2019Publication date: September 26, 2019Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Patent number: 10361168Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: GrantFiled: October 11, 2016Date of Patent: July 23, 2019Assignee: KULICKE AND SOFFA INDUSTRIES, INCInventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Patent number: 10352877Abstract: A method of determining a physical characteristic of an adhesive material on a semiconductor device element using structured light is provided. The method includes the steps of: (1) applying a structured light pattern to an adhesive material on a semiconductor device element; (2) creating an image of the structured light pattern using a camera; and (3) analyzing the image of the structured light pattern to determine a physical characteristic of the adhesive material. Additional methods and systems for determining physical characteristics of semiconductor devices and elements using structured light are also provided.Type: GrantFiled: October 18, 2017Date of Patent: July 16, 2019Assignee: KULICKE AND SOFFA INDUSTRIES, INCInventors: Deepak Sood, Zhijie Wang, Thomas J. Colosimo, Jr., David A. Rauth, Shu-Guo Tang
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Publication number: 20180038806Abstract: A method of determining a physical characteristic of an adhesive material on a semiconductor device element using structured light is provided. The method includes the steps of: (1) applying a structured light pattern to an adhesive material on a semiconductor device element; (2) creating an image of the structured light pattern using a camera; and (3) analyzing the image of the structured light pattern to determine a physical characteristic of the adhesive material. Additional methods and systems for determining physical characteristics of semiconductor devices and elements using structured light are also provided.Type: ApplicationFiled: October 18, 2017Publication date: February 8, 2018Inventors: Deepak Sood, Zhijie Wang, Thomas J. Colosimo, JR., David A. Rauth, Shu-Guo Tang
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Patent number: 9810641Abstract: A method of determining a physical characteristic of an adhesive material on a semiconductor device element using structured light is provided. The method includes the steps of: (1) applying a structured light pattern to an adhesive material on a semiconductor device element; (2) creating an image of the structured light pattern using a camera; and (3) analyzing the image of the structured light pattern to determine a physical characteristic of the adhesive material. Additional methods and systems for determining physical characteristics of semiconductor devices and elements using structured light are also provided.Type: GrantFiled: August 27, 2014Date of Patent: November 7, 2017Assignee: Kulicke & Soffa Industries, Inc.Inventors: Deepak Sood, Zhijie Wang, Thomas J. Colosimo, Jr., David A. Rauth, Shu-Guo Tang
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Publication number: 20170033077Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: ApplicationFiled: October 11, 2016Publication date: February 2, 2017Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Patent number: 9496240Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: GrantFiled: May 17, 2010Date of Patent: November 15, 2016Assignee: Kulicke and Soffa Industries, Inc.Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Publication number: 20150059957Abstract: A method of determining a physical characteristic of an adhesive material on a semiconductor device element using structured light is provided. The method includes the steps of: (1) applying a structured light pattern to an adhesive material on a semiconductor device element; (2) creating an image of the structured light pattern using a camera; and (3) analyzing the image of the structured light pattern to determine a physical characteristic of the adhesive material. Additional methods and systems for determining physical characteristics of semiconductor devices and elements using structured light are also provided.Type: ApplicationFiled: August 27, 2014Publication date: March 5, 2015Inventors: Deepak Sood, Zhijie Wang, Thomas J. Colosimo, JR., David A. Rauth, Shu-Guo Tang
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Patent number: 8302840Abstract: A method of applying bonding energy to form a bond between a portion of a wire and a contact of a bonding location using a wire bonding machine is provided. The method includes: (1) moving a bonding tool towards the contact; (2) detecting when a portion of the contact (100a) is pressed against a device supporting surface (112) of the wire bonding machine; and (3) applying bonding energy to the portion of the contact such that a bond is formed between the contact and the portion of wire.Type: GrantFiled: October 5, 2007Date of Patent: November 6, 2012Assignee: Kulicke and Soffa Industries, Inc.Inventors: Wei Qin, Ziauddin Ahmad, John David Molnar, Deepak Sood, E. Walter Frasch, Chunlong Hu
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Publication number: 20120128229Abstract: A method of imaging a feature of a semiconductor device is provided. The method includes the steps of: (a) imaging a first portion of a semiconductor device to form a first imaged portion; (b) imaging a subsequent portion of the semiconductor device to form a subsequent imaged portion; (c) adding the subsequent imaged portion to the first imaged portion to form a combined imaged portion; and (d) comparing the combined imaged portion to a reference image of a feature to determine a level of correlation of the combined imaged portion to the reference image.Type: ApplicationFiled: November 10, 2011Publication date: May 24, 2012Applicant: KULICKE AND SOFFA INDUSTRIES, INC.Inventors: Paul W. Sucro, Zhijie Wang, Deepak Sood, Peter M. Lister
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Publication number: 20120065761Abstract: A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).Type: ApplicationFiled: May 17, 2010Publication date: March 15, 2012Applicant: KULICKE AND SOFFA INDUSTRIES, INC.Inventors: Ivy Wei Qin, Ray L. Cathcart, Cuong Huynh, Deepak Sood, Paul W. Sucro, Joseph O. DeAngelo
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Patent number: 8100317Abstract: A method of teaching an eyepoint for a wire bonding operation is provided. The method includes (1) selecting a group of shapes from a region of a semiconductor device for use as an eyepoint, and (2) teaching the eyepoint to a wire bonding machine using at least one of (a) a sample semiconductor device, or (b) predetermined data related to the semiconductor device. The teaching step includes defining locations of each of the shapes with respect to one another.Type: GrantFiled: March 28, 2011Date of Patent: January 24, 2012Assignee: Kulicke and Soffa Industries, Inc.Inventors: Michael T. Deley, Peter M. Lister, Deepak Sood, Zhijie Wang
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Publication number: 20110174865Abstract: A method of teaching an eyepoint for a wire bonding operation is provided. The method includes (1) selecting a group of shapes from a region of a semiconductor device for use as an eyepoint, and (2) teaching the eyepoint to a wire bonding machine using at least one of (a) a sample semiconductor device, or (b) predetermined data related to the semiconductor device. The teaching step includes defining locations of each of the shapes with respect to one another.Type: ApplicationFiled: March 28, 2011Publication date: July 21, 2011Applicant: KULICKE AND SOFFA INDUSTRIES, INC.Inventors: Michael T. Deley, Zhijie Wang, Peter M. Lister, Deepak Sood
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Patent number: 7931186Abstract: A method of teaching an eyepoint for a wire bonding operation is provided. The method includes (1) selecting a group of shapes from a region of a semiconductor device for use as an eyepoint, and (2) teaching the eyepoint to a wire bonding machine using at least one of (a) a sample semiconductor device, or (b) predetermined data related to the semiconductor device. The teaching step includes defining locations of each of the shapes with respect to one another.Type: GrantFiled: March 13, 2007Date of Patent: April 26, 2011Assignee: Kulicke and Soffa Industries, Inc.Inventors: Michael T. Deley, Peter M. Lister, Deepak Sood, Zhijie Wang
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Publication number: 20100181365Abstract: A method of teaching an eyepoint for a wire bonding operation is provided. The method includes (1) selecting a group of shapes from a region of a semiconductor device for use as an eyepoint, and (2) teaching the eyepoint to a wire bonding machine using at least one of (a) a sample semiconductor device, or (b) predetermined data related to the semiconductor device. The teaching step includes defining locations of each of the shapes with respect to one another.Type: ApplicationFiled: March 13, 2007Publication date: July 22, 2010Applicant: KULICKE AND SOFFA INDUSTRIES, INC.Inventors: Michael T. Deley, Peter M. Lister, Deepak Sood, Zhijie Wang
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Publication number: 20100108744Abstract: A method of applying bonding energy to form a bond between a portion of a wire and a contact of a bonding location using a wire bonding machine is provided. The method includes: (1) moving a bonding tool towards the contact; (2) detecting when a portion of the contact (100a) is pressed against a device supporting surface (112) of the wire bonding machine; and (3) applying bonding energy to the portion of the contact such that a bond is formed between the contact and the portion of wire.Type: ApplicationFiled: October 5, 2007Publication date: May 6, 2010Applicant: KULICKE AND SOFFA INDUSTRIES, INC.Inventors: Wei Qin, Ziauddin Ahmad, John David Molnar, Deepak Sood, E. Walter Frasch, Chunlong Hu
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Patent number: 7527186Abstract: A system for determining wire bonding tool placement for use with a wire bonder and an optical imager is provided. The system includes a prism disposed below the optical imager and the wire bonding tool. The system also includes at least one lens positioned between the prism and a lower portion of the wire bonding tool along a first optical axis. The at least one lens and the prism define an object plane between the at least one lens and the lower portion of the wire bonding tool. The at least one lens is positioned between the prism and the optical imager along a second optical axis. The at least one lens and the prism define an image plane between the at least one lens and the optical imager.Type: GrantFiled: June 9, 2005Date of Patent: May 5, 2009Assignee: Kulicke and Soffa Industries, Inc.Inventors: David T. Beatson, Deepak Sood, Norman Lucas