Abstract: A disclosed method can include (i) positioning a first surface of a component of a semiconductor device on a first plated through-hole, (ii) covering, with a layer of dielectric material, at least a second surface of the component that is opposite the first surface of the component, (iii) removing a portion of the layer of dielectric material covering the second surface of the component to form at least one cavity, and (iv) depositing conductive material in the cavity to form a second plated through-hole on the second surface of the component. Various other apparatuses, systems, and methods are also disclosed.

Abstract: A method for forming a core for a substrate that removes portions of a resist layer based on a pattern specifying widths of removed portions of the resist layer. The method forms a set of pillars by plating the remaining portions of the resist layer with a conductive material, so each pillar of the set has a perimeter plated with the conductive material. Additionally, each pillar of the set of pillars is encapsulated with a dielectric material. In some implementations, the dielectric material is an organic material.

Abstract: An apparatus and method for efficiently transferring information as signals through a silicon package substrate. A semiconductor fabrication process (or process) begins with a relatively thin package substrate core layer and uses lasers to create openings in the package substrate at locations of the signal routes. The use of each of the relatively thin core layer and the lasers allows for reduction in the pitch of the signal routes. The process creates signal routes in the openings using stacked vias from one side of the package substrate to an opposite side of the package substrate. Additionally, the process forms the package substrate with multiple embedded passive components with different thicknesses in different layers of the package substrate. The embedded passive components are used to improve signal integrity of the signal routes.

Abstract: Apparatuses, systems and methods for efficiently generating a package substrate. A semiconductor fabrication process (or process) fabricates each of a first glass package substrate and a second glass package substrate with a redistribution layer on a single side of a respective glass wafer. The process flips the second glass package substrate upside down and connects the glass wafers of the first and second glass package substrates together using a wafer bonding technique. In some implementations, the process uses copper-based wafer bonding. The resulting bonding between the two glass wafers contains no air gap, no underfill, and no solder bumps. Afterward, the side of the first glass package substrate opposite the glass wafer is connected to at least one integrated circuit. Additionally, the side of the second glass package substrate opposite the glass wafer is connected to a component on the motherboard through pads on the motherboard.

Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.