Abstract: A system for linearizing the output of a high power amplifier (HPA) designed to transmit an RF modulated signal includes in its transmit section a digital up-converter for processing baseband input signals and generating a desired digital RF waveform, T(s). The desired digital RF waveform T(s) is then fed to a digital predistorter circuit for producing a predistorted digital RF waveform P(s)T(s) which, as modified, may be applied via a high sampling speed high linearity digital to analog converter to the high power amplifier (HPA) to produce an output signal which is a linear function of the baseband input signal. The digital predistorter circuit may be of the adaptive type or of the predictive type. Circuits embodying the invention may include encoding circuitry for converting multi-bit signals to a serial stream of single-bit pulses for enabling simplification in the digital to analog conversion.

Abstract: Routing and distribution of radio-frequency (RF) signals is commonly achieved in the analog domain. However, improved performance and simplified circuit architectures may be obtained by first digitizing the RF signal, and then carrying out all routing in the digital domain. A new generation of scalable digital switches has been developed, which routes both the data and clock signals together, this being necessary to maintain the integrity of the digitized RF signal. Given the extremely high switching speeds necessary for these applications (tens of GHz), this is implemented using Rapid-Single-Flux-Quantum (RSFQ) logic with superconducting integrated circuits. Such a digital switch matrix may be applied to either the receiver or transmitter components of an advanced multi-band, multi-channel digital transceiver system, and is compatible with routing of signals with different clock frequencies simultaneously within the same switch matrix.

Abstract: Digital RF correlation based signal processing arrangements allow for the development of software—controlled radio reception without the need for down-conversion to IF frequencies. Various arrangements are implemented using superconducting RSFQ logic enabling the clock and processing speeds required.

Abstract: A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.

Abstract: Digital mixers which permit mixing of asynchronous signals is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.

Abstract: A circuit for converting an n-bit number to a serial stream of single-bit pulses includes circuitry for generating n different sets of pulses; each set of pulses corresponding to a bit of the n-bit binary number; the number of pulses in a set of pulses corresponding to a bit “j” being equal to 2(j−1) pulses, where “j” is an integer which varies from one (1) for the LSB to n for the MSB. The circuit also includes n switches each switch having an input port, an output port and a control port. Each different bit is applied to the control port of a switch and the set of pulses corresponding to the bit is applied to the control port of that switch. The output ports of the n switches are coupled to a common point for combining the signals at the output ports and producing a serial stream of single-bit pulses at the common point which is equivalent to the n-bit binary number.

Abstract: A circuit for converting an n-bit number to a serial stream of single-bit pulses includes circuitry for generating n different sets of pulses; each set of pulses corresponding to a bit of the n-bit binary number; the number of pulses in a set of pulses corresponding to a bit “j” being equal to 2(j−1) pulses, where “j” is an integer which varies from one (1) for the LSB to n for the MSB. The circuit also includes n switches each switch having an input port, an output port and a control port. Each different bit is applied to the control port of a switch and the set of pulses corresponding to the bit is applied to the control port of that switch. The output ports of the n switches are coupled to a common point for combining the signals at the output ports and producing a serial stream of single-bit pulses at the common point which is equivalent to the n-bit binary number.

Abstract: Digital RF correlation based signal processing arrangements allow for the development of software—controlled radio reception without the need for down-conversion to IF frequencies. Various arrangements are implemented using superconducting RSFQ logic enabling the clock and processing speeds required.

Abstract: A dual function superconducting digitizer circuit which can selectively function either as an analog-to-digital converter (ADC) or as a time-to-digital converter (TDC). Superconducting ADCs and TDCs can provide performance far superior to that obtained using conventional electronics by taking advantage of the intrinsic properties—high switching speed, quantum accuracy, dispersion-less transmission lines, radiation hardness, and extremely low power dissipation—of superconductivity. Since both ADC and TDC functions are desired in most measurement systems, a dual-function digitizer is not only more attractive from a system integration perspective but is also more marketable.

Abstract: A system for linearizing the output of a high power amplifier (HPA) designed to transmit an RF modulated signal includes in its transmit section a digital up-converter for processing baseband input signals and generating a desired digital RF waveform, T(s). The desired digital RF waveform T(s) is then fed to a digital predistorter circuit for producing a predistorted digital RF waveform P(s)T(s) which, as modified, may be applied via a high sampling speed high linearity digital to analog converter to the high power amplifier (HPA) to produce an output signal which is a linear function of the baseband input signal. The digital predistorter circuit may be of the adaptive type or of the predictive type. Circuits embodying the invention may include encoding circuitry for converting multi-bit signals to a serial stream of single-bit pulses for enabling simplification in the digital to analog conversion.

Abstract: A dual function superconducting digitizer circuit which can selectively function either as an analog-to-digital converter (ADC) or as a time-to-digital converter (TDC). Superconducting ADCs and TDCs can provide performance far superior to that obtained using conventional electronics by taking advantage of the intrinsic properties—high switching speed, quantum accuracy, dispersion-less transmission lines, radiation hardness, and extremely low power dissipation—of superconductivity. Since both ADC and TDC functions are desired in most measurement systems, a dual-function digitizer is not only more attractive from a system integration perspective but is also more marketable.

Abstract: Subranging techniques using “digital SQUIDs” are used to design systems with large dynamic range, high resolution and large bandwidth. Analog-to-digital converters (ADCs) embodying the invention include a first SQUID based “coarse” resolution circuit and a second SQUID based “fine” resolution circuit to convert an analog input signal into “coarse” and “fine” digital signals for subsequent processing. In one embodiment, an ADC includes circuitry for supplying an analog input signal to an input coil having at least a first inductive section and a second inductive section. A first superconducting quantum interference device (SQUID) is coupled to the first inductive section and a second SQUID is coupled to the second inductive section.

Abstract: Subranging techniques using “digital SQUIDs” are used to design systems with large dynamic range, high resolution and large bandwidth. Analog-to-digital converters (ADCs) embodying the invention include a first SQUID based “coarse” resolution circuit and a second SQUID based “fine” resolution circuit to convert an analog input signal into “coarse” and “fine” digital signals for subsequent processing. In one embodiment, an ADC includes circuitry for supplying an analog input signal to an input coil having at least a first inductive section and a second inductive section. A first superconducting quantum interference device (SQUID) is coupled to the first inductive section and a second SQUID is coupled to the second inductive section.

Abstract: One aspect of the invention is directed to on-chip high-frequency, low-jitter clock circuits including long Josephson junction (LJJ) oscillators usable as clock sources. LJJ oscillators embodying the invention may be formed using either “linear” or “annular” long Josephson junctions. This invention enables the generation and distribution of a stable high-frequency on-chip single flux quantum (SFQ) clock. The on-chip clock circuit may include a clock selector circuit and a clock distribution scheme and may be integrated with RSFQ circuits and/or with a wideband analog-to-digital converter (ADC) comparator. The invention also includes a new fluxon “sender” circuit suitable for synchronizing the LJJ oscillator with another oscillator, either on-chip or external to the chip. The new sender circuit may also enable the realization of a novel phase-locked loop (PLL) circuit.

Abstract: Electrical energy is transferred or switched by selectively holding off the coupling of a magnetic field to a secondary inductive element (a coil) through a path which contains a high temperature superconductive element (HTS) which is capable of holding off the field when in its superconductive state notwithstanding that it is a high energy magnetic field. The HTS operates to hold off the magnetic field in accordance with the flux exclusion effect. When the HTS element is driven normal by heating with a laser pulse, the flux passes through the element and couples the field to the secondary, which may be connected to a load. A primary coil of superconducting material around the secondary coil can provide superconducting magnetic energy storage. The primary field is held off by HTS elements in the flux path to opposite ends of the secondary coil. These elements may be driven normal by laser pulses to transfer the stored magnetic energy to a load.