Patents by Inventor Degang Chen

Degang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141462
    Abstract: A method for smelting low-phosphorus high-manganese steel based on reduction dephosphorization of ferromanganese is provided in the present application, relating to the technical field of high-manganese steel smelting, where the dephosphorization of ferromanganese is carried out under reducing atmosphere conditions through mediate-frequency induction furnace to obtain molten ferromanganese with lower phosphorus content, which is subsequently mixed with low phosphorus molten steel obtained by smelting in oxidative period of electric arc furnace in LF ladle refining furnace to make the Mn content of steel reach the requirement of high-manganese steel, and smelting is carried out under the condition of reducing atmosphere by adjusting the composition and temperature of the molten steel to meet the requirements of the target composition of the steel grade before tapping the steel.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 2, 2024
    Inventors: Tao LI, Wei LIU, Chen CHEN, Fucheng ZHANG, Min TAN, Shaopeng GU, Lin ZHANG, Qian MENG, Degang WEI, Yuhan SUN, Guangbei ZHU, Aihua ZHAO
  • Patent number: 10116317
    Abstract: The present disclosure relates to a signal generator with self-calibration including a main digital-to-analog converter (DAC), a calibration DAC, a summing buffer structure, a two-path filter structure, an analog-to-digital converter (ADC), and a control system. The main DAC provides a main DAC output signal with main DAC distortion. The main DAC output signal is calibrated by a calibration DAC output signal to correct at least a portion of the main DAC distortion. The calibration DAC output signal includes information about the main DAC distortion and is generated by a feedback loop including the summing buffer structure, the two-path filter structure, the filter buffer, the ADC, the control system, and the calibration DAC.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: October 30, 2018
    Assignee: Iowa State University Research Foundation, Inc.
    Inventors: Yuming Zhuang, Degang Chen
  • Patent number: 9184759
    Abstract: A method for testing an analog-to-digital converter is disclosed. In an implementation, the method may include providing input data to analog-to-digital converter circuitry. The analog-to-digital converter circuitry generates an output code based upon the input data. The method includes generating expected output code based upon the corresponding input data and generating an output code error signal based upon the difference of the output code and the expected output code. A predicted code error signal is modeled based upon corresponding code. The method also includes generating a noise error signal representing a difference between the output code error signal and the predicted code error.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: November 10, 2015
    Inventors: Zhongjun Yu, Degang Chen
  • Patent number: 8947276
    Abstract: A method for testing an analog-to-digital converter is disclosed. In an implementation, the method may include providing input data to analog-to-digital converter circuitry. The analog-to-digital converter circuitry generates an output code based upon the input data. The method includes generating expected output code based upon the corresponding input data and generating an output code error signal based upon the difference of the output code and the expected output code. A predicted code error signal is modeled based upon corresponding code. The method also includes generating a noise error signal representing a difference between the output code error signal and the predicted code error.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: February 3, 2015
    Inventors: Zhongjun Yu, Degang Chen
  • Patent number: 7587647
    Abstract: A method of testing an analog and/or mixed-signal circuit can be used in either a production or a built-in self test environment. The method includes generating an excitation signal for testing by using dynamic element matching for performance enhancement of the test signal generator that applies an excitation, and/or by measuring an output of the DUT using dynamic element matching for performance enhancement of an output measurement device. Signal generators and circuits using aspects of the method are also discussed.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: September 8, 2009
    Assignee: Iowa State University Research Foundation, Inc.
    Inventors: Beatriz Olleta, Hanjun Jiang, Degang Chen, Randall L. Geiger
  • Patent number: 7129734
    Abstract: A method for testing a circuit includes determining at least one performance characteristic of the circuit based on a functional relationship between excitation signals or on a functional relationship between measurement devices. The method is implemented either as a part of a built-in self test circuit of an integrated circuit or for production testing.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: October 31, 2006
    Assignees: Iowa State University Research Foundation, Inc., Texas Instruments, Inc.
    Inventors: Randall Geiger, Kumar Parthasarathy, Degang Chen, Le Jin, Turker Kuyel
  • Publication number: 20050088164
    Abstract: A method for testing a circuit includes determining at least one performance characteristic of the circuit based on a functional relationship between excitation signals or on a functional relationship between measurement devices. The method is implemented either as a part of a built-in self test circuit of an integrated circuit or for production testing.
    Type: Application
    Filed: May 21, 2004
    Publication date: April 28, 2005
    Applicant: Iowa State University Research Foundation, Inc.
    Inventors: Randall Geiger, Kumar Parthasarathy, Degang Chen, Le Jin, Turker Kuyel
  • Publication number: 20050057271
    Abstract: A method of testing an analog and/or mixed-signal circuit can be used in either a production or a built-in self test environment. The method includes generating an excitation signal for testing by using dynamic element matching for performance enhancement of the test signal generator that applies an excitation, and/or by measuring an output of the DUT using dynamic element matching for performance enhancement of an output measurement device. Signal generators and circuits using aspects of the method are also discussed.
    Type: Application
    Filed: July 30, 2004
    Publication date: March 17, 2005
    Inventors: Beatriz Olleta, Hanjun Jiang, Degang Chen, Randall Geiger